[PATCH] perf vendor events arm64: Remove uncountable events

[PATCH] perf vendor events arm64: Remove uncountable events

[James Clark]

These events are never countable by the PMU and are only intended to
be used as external inputs to trace. Therefore showing them in 'perf
list' is misleading so remove them.

The generator script doesn't emit these events when used with the new
telemetry-solution input files [1].

'perf list' should only show countable events because there are events
that are sometimes implemented, sometimes countable and sometimes not,
for example TRB_TRIG. If we always include any implemented events
whether they are countable or not then it's not possible to tell whether
they are usable in perf without going to the docs, defeating the point
of 'perf list'.

It's also not useful yet to display implemented events that are not
countable (for help in using trace rather than perf stat), because
PMU_OVFS and PMU_HOVFS are practically always implemented and TRB_TRIG
is always implemented when there is TRBE.

[1]: https://gitlab.arm.com/telemetry-solution/telemetry-solution/-/tree/main/data/pmu/cpu

Signed-off-by: James Clark <james.clark@linaro.org>
---
 tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json  |  8 --------
 tools/perf/pmu-events/arch/arm64/common-and-microarch.json | 12 ------------
 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json   | 10 ----------
 3 files changed, 30 deletions(-)

diff --git a/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json b/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json
deleted file mode 100644
index d8b7b9f9e5fa..000000000000
--- a/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json
+++ /dev/null
@@ -1,8 +0,0 @@
-[
-    {
-        "ArchStdEvent": "PMU_OVFS"
-    },
-    {
-        "ArchStdEvent": "PMU_HOVFS"
-    }
-]
diff --git a/tools/perf/pmu-events/arch/arm64/common-and-microarch.json b/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
index 2416d9f8a83d..468cb085d879 100644
--- a/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
+++ b/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
@@ -432,24 +432,12 @@
         "EventName": "TRB_WRAP",
         "BriefDescription": "Trace buffer current write pointer wrapped"
     },
-    {
-        "PublicDescription": "PMU overflow, counters accessible to EL1 and EL0",
-        "EventCode": "0x400D",
-        "EventName": "PMU_OVFS",
-        "BriefDescription": "PMU overflow, counters accessible to EL1 and EL0"
-    },
     {
         "PublicDescription": "Trace buffer Trigger Event",
         "EventCode": "0x400E",
         "EventName": "TRB_TRIG",
         "BriefDescription": "Trace buffer Trigger Event"
     },
-    {
-        "PublicDescription": "PMU overflow, counters reserved for use by EL2",
-        "EventCode": "0x400F",
-        "EventName": "PMU_HOVFS",
-        "BriefDescription": "PMU overflow, counters reserved for use by EL2"
-    },
     {
         "PublicDescription": "PE Trace Unit external output 0",
         "EventCode": "0x4010",
diff --git a/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json b/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json
deleted file mode 100644
index 65bd6cdd0dd5..000000000000
--- a/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json
+++ /dev/null
@@ -1,10 +0,0 @@
-[
-    {
-        "ArchStdEvent": "PMU_OVFS",
-        "BriefDescription": "This event counts the event generated each time one of the condition occurs described in Arm Architecture Reference Manual for A-profile architecture. This event is only for output to the trace unit."
-    },
-    {
-        "ArchStdEvent": "PMU_HOVFS",
-        "BriefDescription": "This event counts the event generated each time an event is counted by an event counter <n> and all of the condition occur described in Arm Architecture Reference Manual for A-profile architecture. This event is only for output to the trace unit."
-    }
-]

---
base-commit: cbd41c6d4c26c161a2b0e70ad411d3885ff13507
change-id: 20251230-james-perf-uncountable-events-28adfb93b73f

Best regards,
-- 
James Clark <james.clark@linaro.org>

Re: [PATCH] perf vendor events arm64: Remove uncountable events

[Ian Rogers]

On Wed, Dec 31, 2025 at 4:13 AM James Clark <james.clark@linaro.org> wrote:
>
> These events are never countable by the PMU and are only intended to
> be used as external inputs to trace. Therefore showing them in 'perf
> list' is misleading so remove them.

What does "trace" mean in this context?

Thanks,
Ian

> The generator script doesn't emit these events when used with the new
> telemetry-solution input files [1].
>
> 'perf list' should only show countable events because there are events
> that are sometimes implemented, sometimes countable and sometimes not,
> for example TRB_TRIG. If we always include any implemented events
> whether they are countable or not then it's not possible to tell whether
> they are usable in perf without going to the docs, defeating the point
> of 'perf list'.
>
> It's also not useful yet to display implemented events that are not
> countable (for help in using trace rather than perf stat), because
> PMU_OVFS and PMU_HOVFS are practically always implemented and TRB_TRIG
> is always implemented when there is TRBE.
>
> [1]: https://gitlab.arm.com/telemetry-solution/telemetry-solution/-/tree/main/data/pmu/cpu
>
> Signed-off-by: James Clark <james.clark@linaro.org>
> ---
>  tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json  |  8 --------
>  tools/perf/pmu-events/arch/arm64/common-and-microarch.json | 12 ------------
>  tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json   | 10 ----------
>  3 files changed, 30 deletions(-)
>
> diff --git a/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json b/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json
> deleted file mode 100644
> index d8b7b9f9e5fa..000000000000
> --- a/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json
> +++ /dev/null
> @@ -1,8 +0,0 @@
> -[
> -    {
> -        "ArchStdEvent": "PMU_OVFS"
> -    },
> -    {
> -        "ArchStdEvent": "PMU_HOVFS"
> -    }
> -]
> diff --git a/tools/perf/pmu-events/arch/arm64/common-and-microarch.json b/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
> index 2416d9f8a83d..468cb085d879 100644
> --- a/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
> +++ b/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
> @@ -432,24 +432,12 @@
>          "EventName": "TRB_WRAP",
>          "BriefDescription": "Trace buffer current write pointer wrapped"
>      },
> -    {
> -        "PublicDescription": "PMU overflow, counters accessible to EL1 and EL0",
> -        "EventCode": "0x400D",
> -        "EventName": "PMU_OVFS",
> -        "BriefDescription": "PMU overflow, counters accessible to EL1 and EL0"
> -    },
>      {
>          "PublicDescription": "Trace buffer Trigger Event",
>          "EventCode": "0x400E",
>          "EventName": "TRB_TRIG",
>          "BriefDescription": "Trace buffer Trigger Event"
>      },
> -    {
> -        "PublicDescription": "PMU overflow, counters reserved for use by EL2",
> -        "EventCode": "0x400F",
> -        "EventName": "PMU_HOVFS",
> -        "BriefDescription": "PMU overflow, counters reserved for use by EL2"
> -    },
>      {
>          "PublicDescription": "PE Trace Unit external output 0",
>          "EventCode": "0x4010",
> diff --git a/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json b/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json
> deleted file mode 100644
> index 65bd6cdd0dd5..000000000000
> --- a/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json
> +++ /dev/null
> @@ -1,10 +0,0 @@
> -[
> -    {
> -        "ArchStdEvent": "PMU_OVFS",
> -        "BriefDescription": "This event counts the event generated each time one of the condition occurs described in Arm Architecture Reference Manual for A-profile architecture. This event is only for output to the trace unit."
> -    },
> -    {
> -        "ArchStdEvent": "PMU_HOVFS",
> -        "BriefDescription": "This event counts the event generated each time an event is counted by an event counter <n> and all of the condition occur described in Arm Architecture Reference Manual for A-profile architecture. This event is only for output to the trace unit."
> -    }
> -]
>
> ---
> base-commit: cbd41c6d4c26c161a2b0e70ad411d3885ff13507
> change-id: 20251230-james-perf-uncountable-events-28adfb93b73f
>
> Best regards,
> --
> James Clark <james.clark@linaro.org>
>

Re: [PATCH] perf vendor events arm64: Remove uncountable events

[James Clark]

On 02/01/2026 3:29 pm, Ian Rogers wrote:
> On Wed, Dec 31, 2025 at 4:13 AM James Clark <james.clark@linaro.org> wrote:
>>
>> These events are never countable by the PMU and are only intended to
>> be used as external inputs to trace. Therefore showing them in 'perf
>> list' is misleading so remove them.
> 
> What does "trace" mean in this context?
> 

CPU trace, Either ETE (Embedded Trace Extension) or ETM (Embedded Trace 
Macrocell). You can select PMU events as inputs to the trace block to 
make it do things like start and stop tracing.

> Thanks,
> Ian
> 
>> The generator script doesn't emit these events when used with the new
>> telemetry-solution input files [1].
>>
>> 'perf list' should only show countable events because there are events
>> that are sometimes implemented, sometimes countable and sometimes not,
>> for example TRB_TRIG. If we always include any implemented events
>> whether they are countable or not then it's not possible to tell whether
>> they are usable in perf without going to the docs, defeating the point
>> of 'perf list'.
>>
>> It's also not useful yet to display implemented events that are not
>> countable (for help in using trace rather than perf stat), because
>> PMU_OVFS and PMU_HOVFS are practically always implemented and TRB_TRIG
>> is always implemented when there is TRBE.
>>
>> [1]: https://gitlab.arm.com/telemetry-solution/telemetry-solution/-/tree/main/data/pmu/cpu
>>
>> Signed-off-by: James Clark <james.clark@linaro.org>
>> ---
>>   tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json  |  8 --------
>>   tools/perf/pmu-events/arch/arm64/common-and-microarch.json | 12 ------------
>>   tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json   | 10 ----------
>>   3 files changed, 30 deletions(-)
>>
>> diff --git a/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json b/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json
>> deleted file mode 100644
>> index d8b7b9f9e5fa..000000000000
>> --- a/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json
>> +++ /dev/null
>> @@ -1,8 +0,0 @@
>> -[
>> -    {
>> -        "ArchStdEvent": "PMU_OVFS"
>> -    },
>> -    {
>> -        "ArchStdEvent": "PMU_HOVFS"
>> -    }
>> -]
>> diff --git a/tools/perf/pmu-events/arch/arm64/common-and-microarch.json b/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
>> index 2416d9f8a83d..468cb085d879 100644
>> --- a/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
>> +++ b/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
>> @@ -432,24 +432,12 @@
>>           "EventName": "TRB_WRAP",
>>           "BriefDescription": "Trace buffer current write pointer wrapped"
>>       },
>> -    {
>> -        "PublicDescription": "PMU overflow, counters accessible to EL1 and EL0",
>> -        "EventCode": "0x400D",
>> -        "EventName": "PMU_OVFS",
>> -        "BriefDescription": "PMU overflow, counters accessible to EL1 and EL0"
>> -    },
>>       {
>>           "PublicDescription": "Trace buffer Trigger Event",
>>           "EventCode": "0x400E",
>>           "EventName": "TRB_TRIG",
>>           "BriefDescription": "Trace buffer Trigger Event"
>>       },
>> -    {
>> -        "PublicDescription": "PMU overflow, counters reserved for use by EL2",
>> -        "EventCode": "0x400F",
>> -        "EventName": "PMU_HOVFS",
>> -        "BriefDescription": "PMU overflow, counters reserved for use by EL2"
>> -    },
>>       {
>>           "PublicDescription": "PE Trace Unit external output 0",
>>           "EventCode": "0x4010",
>> diff --git a/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json b/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json
>> deleted file mode 100644
>> index 65bd6cdd0dd5..000000000000
>> --- a/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json
>> +++ /dev/null
>> @@ -1,10 +0,0 @@
>> -[
>> -    {
>> -        "ArchStdEvent": "PMU_OVFS",
>> -        "BriefDescription": "This event counts the event generated each time one of the condition occurs described in Arm Architecture Reference Manual for A-profile architecture. This event is only for output to the trace unit."
>> -    },
>> -    {
>> -        "ArchStdEvent": "PMU_HOVFS",
>> -        "BriefDescription": "This event counts the event generated each time an event is counted by an event counter <n> and all of the condition occur described in Arm Architecture Reference Manual for A-profile architecture. This event is only for output to the trace unit."
>> -    }
>> -]
>>
>> ---
>> base-commit: cbd41c6d4c26c161a2b0e70ad411d3885ff13507
>> change-id: 20251230-james-perf-uncountable-events-28adfb93b73f
>>
>> Best regards,
>> --
>> James Clark <james.clark@linaro.org>
>>

Re: [PATCH] perf vendor events arm64: Remove uncountable events

[Ian Rogers]

On Sat, Jan 3, 2026 at 8:38 AM James Clark <james.clark@linaro.org> wrote:
>
>
>
> On 02/01/2026 3:29 pm, Ian Rogers wrote:
> > On Wed, Dec 31, 2025 at 4:13 AM James Clark <james.clark@linaro.org> wrote:
> >>
> >> These events are never countable by the PMU and are only intended to
> >> be used as external inputs to trace. Therefore showing them in 'perf
> >> list' is misleading so remove them.
> >
> > What does "trace" mean in this context?
> >
>
> CPU trace, Either ETE (Embedded Trace Extension) or ETM (Embedded Trace
> Macrocell). You can select PMU events as inputs to the trace block to
> make it do things like start and stop tracing.

Ah ok, trace immediately makes me think of `perf trace` currently.
Presumably there's no perf integration for ETE and ETM that somehow
use these event encodings? Looks not and the changes make sense to me.

Reviewed-by: Ian Rogers <irogers@google.com>

Thanks,
Ian

> > Thanks,
> > Ian
> >
> >> The generator script doesn't emit these events when used with the new
> >> telemetry-solution input files [1].
> >>
> >> 'perf list' should only show countable events because there are events
> >> that are sometimes implemented, sometimes countable and sometimes not,
> >> for example TRB_TRIG. If we always include any implemented events
> >> whether they are countable or not then it's not possible to tell whether
> >> they are usable in perf without going to the docs, defeating the point
> >> of 'perf list'.
> >>
> >> It's also not useful yet to display implemented events that are not
> >> countable (for help in using trace rather than perf stat), because
> >> PMU_OVFS and PMU_HOVFS are practically always implemented and TRB_TRIG
> >> is always implemented when there is TRBE.
> >>
> >> [1]: https://gitlab.arm.com/telemetry-solution/telemetry-solution/-/tree/main/data/pmu/cpu
> >>
> >> Signed-off-by: James Clark <james.clark@linaro.org>
> >> ---
> >>   tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json  |  8 --------
> >>   tools/perf/pmu-events/arch/arm64/common-and-microarch.json | 12 ------------
> >>   tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json   | 10 ----------
> >>   3 files changed, 30 deletions(-)
> >>
> >> diff --git a/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json b/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json
> >> deleted file mode 100644
> >> index d8b7b9f9e5fa..000000000000
> >> --- a/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json
> >> +++ /dev/null
> >> @@ -1,8 +0,0 @@
> >> -[
> >> -    {
> >> -        "ArchStdEvent": "PMU_OVFS"
> >> -    },
> >> -    {
> >> -        "ArchStdEvent": "PMU_HOVFS"
> >> -    }
> >> -]
> >> diff --git a/tools/perf/pmu-events/arch/arm64/common-and-microarch.json b/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
> >> index 2416d9f8a83d..468cb085d879 100644
> >> --- a/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
> >> +++ b/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
> >> @@ -432,24 +432,12 @@
> >>           "EventName": "TRB_WRAP",
> >>           "BriefDescription": "Trace buffer current write pointer wrapped"
> >>       },
> >> -    {
> >> -        "PublicDescription": "PMU overflow, counters accessible to EL1 and EL0",
> >> -        "EventCode": "0x400D",
> >> -        "EventName": "PMU_OVFS",
> >> -        "BriefDescription": "PMU overflow, counters accessible to EL1 and EL0"
> >> -    },
> >>       {
> >>           "PublicDescription": "Trace buffer Trigger Event",
> >>           "EventCode": "0x400E",
> >>           "EventName": "TRB_TRIG",
> >>           "BriefDescription": "Trace buffer Trigger Event"
> >>       },
> >> -    {
> >> -        "PublicDescription": "PMU overflow, counters reserved for use by EL2",
> >> -        "EventCode": "0x400F",
> >> -        "EventName": "PMU_HOVFS",
> >> -        "BriefDescription": "PMU overflow, counters reserved for use by EL2"
> >> -    },
> >>       {
> >>           "PublicDescription": "PE Trace Unit external output 0",
> >>           "EventCode": "0x4010",
> >> diff --git a/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json b/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json
> >> deleted file mode 100644
> >> index 65bd6cdd0dd5..000000000000
> >> --- a/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json
> >> +++ /dev/null
> >> @@ -1,10 +0,0 @@
> >> -[
> >> -    {
> >> -        "ArchStdEvent": "PMU_OVFS",
> >> -        "BriefDescription": "This event counts the event generated each time one of the condition occurs described in Arm Architecture Reference Manual for A-profile architecture. This event is only for output to the trace unit."
> >> -    },
> >> -    {
> >> -        "ArchStdEvent": "PMU_HOVFS",
> >> -        "BriefDescription": "This event counts the event generated each time an event is counted by an event counter <n> and all of the condition occur described in Arm Architecture Reference Manual for A-profile architecture. This event is only for output to the trace unit."
> >> -    }
> >> -]
> >>
> >> ---
> >> base-commit: cbd41c6d4c26c161a2b0e70ad411d3885ff13507
> >> change-id: 20251230-james-perf-uncountable-events-28adfb93b73f
> >>
> >> Best regards,
> >> --
> >> James Clark <james.clark@linaro.org>
> >>
>

Re: [PATCH] perf vendor events arm64: Remove uncountable events

[James Clark]

On 04/01/2026 1:27 am, Ian Rogers wrote:
> On Sat, Jan 3, 2026 at 8:38 AM James Clark <james.clark@linaro.org> wrote:
>>
>>
>>
>> On 02/01/2026 3:29 pm, Ian Rogers wrote:
>>> On Wed, Dec 31, 2025 at 4:13 AM James Clark <james.clark@linaro.org> wrote:
>>>>
>>>> These events are never countable by the PMU and are only intended to
>>>> be used as external inputs to trace. Therefore showing them in 'perf
>>>> list' is misleading so remove them.
>>>
>>> What does "trace" mean in this context?
>>>
>>
>> CPU trace, Either ETE (Embedded Trace Extension) or ETM (Embedded Trace
>> Macrocell). You can select PMU events as inputs to the trace block to
>> make it do things like start and stop tracing.
> 
> Ah ok, trace immediately makes me think of `perf trace` currently.
> Presumably there's no perf integration for ETE and ETM that somehow
> use these event encodings? Looks not and the changes make sense to me.

Not yet, currently you have to create kernel modules to do complex trace 
configs.

> 
> Reviewed-by: Ian Rogers <irogers@google.com>
> 
> Thanks,
> Ian
>

Thanks!

>>> Thanks,
>>> Ian
>>>
>>>> The generator script doesn't emit these events when used with the new
>>>> telemetry-solution input files [1].
>>>>
>>>> 'perf list' should only show countable events because there are events
>>>> that are sometimes implemented, sometimes countable and sometimes not,
>>>> for example TRB_TRIG. If we always include any implemented events
>>>> whether they are countable or not then it's not possible to tell whether
>>>> they are usable in perf without going to the docs, defeating the point
>>>> of 'perf list'.
>>>>
>>>> It's also not useful yet to display implemented events that are not
>>>> countable (for help in using trace rather than perf stat), because
>>>> PMU_OVFS and PMU_HOVFS are practically always implemented and TRB_TRIG
>>>> is always implemented when there is TRBE.
>>>>
>>>> [1]: https://gitlab.arm.com/telemetry-solution/telemetry-solution/-/tree/main/data/pmu/cpu
>>>>
>>>> Signed-off-by: James Clark <james.clark@linaro.org>
>>>> ---
>>>>    tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json  |  8 --------
>>>>    tools/perf/pmu-events/arch/arm64/common-and-microarch.json | 12 ------------
>>>>    tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json   | 10 ----------
>>>>    3 files changed, 30 deletions(-)
>>>>
>>>> diff --git a/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json b/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json
>>>> deleted file mode 100644
>>>> index d8b7b9f9e5fa..000000000000
>>>> --- a/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/pmu.json
>>>> +++ /dev/null
>>>> @@ -1,8 +0,0 @@
>>>> -[
>>>> -    {
>>>> -        "ArchStdEvent": "PMU_OVFS"
>>>> -    },
>>>> -    {
>>>> -        "ArchStdEvent": "PMU_HOVFS"
>>>> -    }
>>>> -]
>>>> diff --git a/tools/perf/pmu-events/arch/arm64/common-and-microarch.json b/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
>>>> index 2416d9f8a83d..468cb085d879 100644
>>>> --- a/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
>>>> +++ b/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
>>>> @@ -432,24 +432,12 @@
>>>>            "EventName": "TRB_WRAP",
>>>>            "BriefDescription": "Trace buffer current write pointer wrapped"
>>>>        },
>>>> -    {
>>>> -        "PublicDescription": "PMU overflow, counters accessible to EL1 and EL0",
>>>> -        "EventCode": "0x400D",
>>>> -        "EventName": "PMU_OVFS",
>>>> -        "BriefDescription": "PMU overflow, counters accessible to EL1 and EL0"
>>>> -    },
>>>>        {
>>>>            "PublicDescription": "Trace buffer Trigger Event",
>>>>            "EventCode": "0x400E",
>>>>            "EventName": "TRB_TRIG",
>>>>            "BriefDescription": "Trace buffer Trigger Event"
>>>>        },
>>>> -    {
>>>> -        "PublicDescription": "PMU overflow, counters reserved for use by EL2",
>>>> -        "EventCode": "0x400F",
>>>> -        "EventName": "PMU_HOVFS",
>>>> -        "BriefDescription": "PMU overflow, counters reserved for use by EL2"
>>>> -    },
>>>>        {
>>>>            "PublicDescription": "PE Trace Unit external output 0",
>>>>            "EventCode": "0x4010",
>>>> diff --git a/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json b/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json
>>>> deleted file mode 100644
>>>> index 65bd6cdd0dd5..000000000000
>>>> --- a/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pmu.json
>>>> +++ /dev/null
>>>> @@ -1,10 +0,0 @@
>>>> -[
>>>> -    {
>>>> -        "ArchStdEvent": "PMU_OVFS",
>>>> -        "BriefDescription": "This event counts the event generated each time one of the condition occurs described in Arm Architecture Reference Manual for A-profile architecture. This event is only for output to the trace unit."
>>>> -    },
>>>> -    {
>>>> -        "ArchStdEvent": "PMU_HOVFS",
>>>> -        "BriefDescription": "This event counts the event generated each time an event is counted by an event counter <n> and all of the condition occur described in Arm Architecture Reference Manual for A-profile architecture. This event is only for output to the trace unit."
>>>> -    }
>>>> -]
>>>>
>>>> ---
>>>> base-commit: cbd41c6d4c26c161a2b0e70ad411d3885ff13507
>>>> change-id: 20251230-james-perf-uncountable-events-28adfb93b73f
>>>>
>>>> Best regards,
>>>> --
>>>> James Clark <james.clark@linaro.org>
>>>>
>>

Re: [PATCH] perf vendor events arm64: Remove uncountable events

[Arnaldo Carvalho de Melo]

On Sat, Jan 03, 2026 at 05:27:49PM -0800, Ian Rogers wrote:
> On Sat, Jan 3, 2026 at 8:38 AM James Clark <james.clark@linaro.org> wrote:
> > On 02/01/2026 3:29 pm, Ian Rogers wrote:
> > > On Wed, Dec 31, 2025 at 4:13 AM James Clark <james.clark@linaro.org> wrote:
> > >> These events are never countable by the PMU and are only intended to
> > >> be used as external inputs to trace. Therefore showing them in 'perf
> > >> list' is misleading so remove them.

> > > What does "trace" mean in this context?

> > CPU trace, Either ETE (Embedded Trace Extension) or ETM (Embedded Trace
> > Macrocell). You can select PMU events as inputs to the trace block to
> > make it do things like start and stop tracing.

> Ah ok, trace immediately makes me think of `perf trace` currently.
> Presumably there's no perf integration for ETE and ETM that somehow
> use these event encodings? Looks not and the changes make sense to me.
> 
> Reviewed-by: Ian Rogers <irogers@google.com>

Thanks, applied to perf-tools-next,

- Arnaldo