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b=P9H/Nd9meIDed7qu/cwVrC+SAf H5B+l1TOcHF68tQvca42uE+EHuoM987Rq7Xu9rl1ZwHLEiK8M+VUs0dKW8y8yGIyTl3ie6IMU4UKh YVStldrpw4Qp+67x9HRFZ6jHr7lRObEXorWIXr7JrzFSHSJSk6k4drDjCvVA6MeGoKgQ=; Received: from [95.248.141.113] (port=60003 helo=bywater) by esm19.siteground.biz with essmtpa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.99.1) (envelope-from ) id 1vgjUd-00000000M5y-1XmV; Fri, 16 Jan 2026 13:03:59 +0000 Date: Fri, 16 Jan 2026 14:03:57 +0100 From: Francesco Valla To: Daniel Baluta Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: dts: imx91-11x11-frdm: fix CAN transceiver gpio Message-ID: References: <20260115-imx91_fix-v1-1-9351c3fac76a@valla.it> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - esm19.siteground.biz X-AntiAbuse: Original Domain - lists.infradead.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - valla.it X-Source: X-Source-Args: X-Source-Dir: X-SGantispam-id: 6a24f6a303db1600773d4a81a1927982 AntiSpam-DLS: false AntiSpam-DLSP: AntiSpam-DLSRS: AntiSpam-TS: 1.0 CFBL-Address: feedback@antispam.mailspamprotection.com; report=arf CFBL-Feedback-ID: 1vgjUz-00000001br1-0ZUz-feedback@antispam.mailspamprotection.com Authentication-Results: outgoing.instance-europe-west4-l5rn.prod.antispam.mailspamprotection.com; iprev=pass (214.173.214.35.bc.googleusercontent.com) smtp.remote-ip=35.214.173.214; auth=pass (LOGIN) smtp.auth=esm19.siteground.biz; dkim=pass header.d=valla.it header.s=default header.a=rsa-sha256; arc=none X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260116_050430_397971_27D5FBB1 X-CRM114-Status: GOOD ( 17.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Daniel, On Fri, Jan 16, 2026 at 01:40:11PM +0200, Daniel Baluta wrote: > On Thu, Jan 15, 2026 at 8:25 PM Francesco Valla wrote: > > > > According to the HW schematic, the CAN transceiver does not have an > > enable pin but a silent one. Fix the GPIO property name and polarity. > > > > Fixes: b4bf5e55899e ("arm64: dts: freescale: Add FRDM-IMX91 basic support") > > Just for clarification GPIO 23 is connected to a pin named CAN_STBY. > So I wonder if it isn't > better to use standby-gpios instead of silent-gpios? > > I am looking at FRDM-IMX91 schematic file SPF-94610_A1.pdf. > > But on the other hand we have > > static const struct can_transceiver_data tja1051_drvdata = { > » .flags = CAN_TRANSCEIVER_SILENT_PRESENT | CAN_TRANSCEIVER_EN_PRESENT, > }; > > So TJA1051 is not advertised as having a stdby flag. Regardless of the name of the net, the functionality of a standby vs a silent pin is very different. In this case, since the TJA1051 is including a silent pin (pin S in he datasheet [0]), I think it's better to declare it that way. In case someone adds the support for a phy-oriented listen-only mode (which is something I am thinking), this wouldn't break the integartion. Regards, Francesco [0] https://www.nxp.com/docs/en/data-sheet/TJA1051.pdf