From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EE598C98312 for ; Sat, 17 Jan 2026 07:20:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=xx6KTAJQqFH7D1r/0CU9Vz1o+maMLDWloBTOsh6drjA=; b=A6G5wyCkjp/jBaslID6G2yFwtS 7elDhEdG8tKLp+MrcQf7CiDFKlSoM7m4JFYk7byoYeHSEk1W/l+pYc1ZOGG8yrm3oBtvhfxVuXp8J T1K107LPP5ZXUJbzkiyz59Mz0dOgRK6aS+ANzHeoee+z9hTU8jPjQt++zfnl++Pz9nnAuoAUwgBso 56vV3ZGHycRZ+LrNAoIt/skL22dbrToCB5d7xrL0rk9QRSRj+I4n0X7/kDHpAcrR7q6L2m4nGxOCC JbRmx956Wv+jOvvTRYvbx+qLvZuoHzqtuFd06GanbegEivKNbrsCryfQfFpok0CaEgGXSEttCeJde 7lBaKT9A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vh0bX-0000000FMS9-23oE; Sat, 17 Jan 2026 07:20:17 +0000 Received: from sea.source.kernel.org ([172.234.252.31]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vh0bU-0000000FMRm-2AOX for linux-arm-kernel@lists.infradead.org; Sat, 17 Jan 2026 07:20:13 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id C654741873; Sat, 17 Jan 2026 07:20:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D4FBBC4CEF7; Sat, 17 Jan 2026 07:20:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1768634411; bh=F2GMg/VZM6QiYEeHy0ywYCy4gECwdwthARbVIQ2/Qxk=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Hy2oqD2Nt9ED6ydmpNopLhals8dMyVUZZFGtSwCjdZsG7dYx3YGtXM4c6VdsF6N9b HhPRIMoGwO+7OtLli80HSwhx1XqSn5B0K/aOcqCw9grunSrgI9N/UCNOZQN95wMoCJ 4YUohLc22cvgjSfMCnaCKViHsHCJCZ2q6t3dVvCwNhgqmjUmueuZQaFmi9wgl6+As/ Q8t8XbOldyeRMKFoQFDqJSgoc2/tUlvbUv+ILi05013jqWj3omlaC094iUMAX7vGDA 0lywUeqdLCzF3bhJAYLpEuIly7iobUh0o3vRmjMeDEbfOKdR9TMmDTVcLT7p9aIEyF UHVa6a9ACCtFQ== Date: Sat, 17 Jan 2026 15:20:02 +0800 From: Shawn Guo To: Stefano Radaelli Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Stefano Radaelli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Alexander Stein , Dario Binacchi , Markus Niebel , Primoz Fiser , Yannic Moog , Josua Mayer , Francesco Dolcini , imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v4 3/3] arm64: dts: imx95-var-dart: Add support for Variscite Sonata board Message-ID: References: <20260106130741.91532-1-stefano.r@variscite.com> <20260106130741.91532-4-stefano.r@variscite.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260106130741.91532-4-stefano.r@variscite.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260116_232012_613570_193F6548 X-CRM114-Status: GOOD ( 24.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jan 06, 2026 at 02:07:32PM +0100, Stefano Radaelli wrote: > From: Stefano Radaelli > > Add device tree support for the Variscite Sonata carrier board with > the DART-MX95 system on module. > > The Sonata board includes > - uSD Card support > - USB ports and OTG > - Additional Gigabit Ethernet interface > - 10Gb Ethernet SFP+ connector > - Uart interfaces > - OV5640 Camera support > - GPIO Expanders > - RTC module > - TPM module > - PCIE support > > Link: https://variscite.com/carrier-boards/sonata-board/ > Signed-off-by: Stefano Radaelli > --- > v4: > - Add GPIO_OPEN_DRAIN to i2c gpios > - Move pinmux to eof > v3: > - Fix specific node names with generic ones > - Remove fixed-link property for SFP > v2: > - Add SFP cage node for enetc_port2 following sff,sfp.yaml binding > > arch/arm64/boot/dts/freescale/Makefile | 1 + > .../dts/freescale/imx95-var-dart-sonata.dts | 590 ++++++++++++++++++ > 2 files changed, 591 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx95-var-dart-sonata.dts > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index f30d3fd724d0..411f86013ec6 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -404,6 +404,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk-sof.dtb > dtb-$(CONFIG_ARCH_MXC) += imx95-toradex-smarc-dev.dtb > dtb-$(CONFIG_ARCH_MXC) += imx95-tqma9596sa-mb-smarc-2.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx95-var-dart-sonata.dtb > > imx95-15x15-evk-pcie0-ep-dtbs = imx95-15x15-evk.dtb imx-pcie0-ep.dtbo > dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk-pcie0-ep.dtb > diff --git a/arch/arm64/boot/dts/freescale/imx95-var-dart-sonata.dts b/arch/arm64/boot/dts/freescale/imx95-var-dart-sonata.dts > new file mode 100644 > index 000000000000..d36d62243a36 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx95-var-dart-sonata.dts > @@ -0,0 +1,590 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Variscite Sonata carrier board for DART-MX95 > + * > + * Link: https://variscite.com/carrier-boards/sonata-board/ > + * > + * Copyright (C) 2025 Variscite Ltd. - https://www.variscite.com/ > + * > + */ > + > +#include "imx95-var-dart.dtsi" > + > +/ { > + model = "Variscite DART-MX95 on Sonata-Board"; > + compatible = "variscite,var-dart-mx95-sonata", > + "variscite,var-dart-mx95", > + "fsl,imx95"; > + > + aliases { > + mmc0 = &usdhc1; > + mmc1 = &usdhc2; > + serial0 = &lpuart1; > + ethernet0 = &enetc_port0; > + ethernet1 = &enetc_port1; > + ethernet2 = &enetc_port2; Could you sort them alphabetically? > + }; > + > + chosen { > + stdout-path = &lpuart1; > + }; > + > + typec_con: connector { > + compatible = "usb-c-connector"; > + data-role = "dual"; > + label = "USB-C"; > + op-sink-microwatt = <0>; > + power-role = "dual"; > + self-powered; > + sink-pdos = ; > + source-pdos = ; > + try-power-role = "sink"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; Have a newline between properties and child node. > + typec_con_hs: endpoint { > + remote-endpoint = <&usb3_data_hs>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + typec_con_ss: endpoint { > + remote-endpoint = <&usb3_data_ss>; > + }; > + }; > + }; > + }; > + > + clk_osc_can0: clock-osc-40m { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <40000000>; > + }; > + > + gpio-leds { > + compatible = "gpio-leds"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_gpio_leds>; > + > + led-heartbeat { > + label = "Heartbeat"; > + gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; > + linux,default-trigger = "heartbeat"; > + }; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + > + button-back { > + label = "Back"; > + linux,code = ; > + gpios = <&pca6408_1 7 GPIO_ACTIVE_LOW>; > + wakeup-source; > + }; > + > + button-up { > + label = "Up"; > + linux,code = ; > + gpios = <&pca6408_1 5 GPIO_ACTIVE_LOW>; > + wakeup-source; > + }; > + > + button-home { > + label = "Home"; > + linux,code = ; > + gpios = <&pca6408_1 4 GPIO_ACTIVE_LOW>; > + wakeup-source; > + }; > + > + button-down { > + label = "Down"; > + linux,code = ; > + gpios = <&pca6408_1 6 GPIO_ACTIVE_LOW>; > + wakeup-source; > + }; > + }; > + > + reg_usdhc2_vmmc: regulator-vmmc-usdhc2 { > + compatible = "regulator-fixed"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; > + regulator-name = "VDD_SD2_3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; > + off-on-delay-us = <12000>; > + enable-active-high; enable-active-high right after GPIO_ACTIVE_HIGH line. > + }; > + > + reg_phy1_supply: regulator-phy1 { > + compatible = "regulator-fixed"; > + regulator-name = "SUPPLY_PHY1"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + gpio = <&pca6408_2 0 GPIO_ACTIVE_LOW>; > + startup-delay-us = <10000>; > + enable-active-high; enable-active-high conflicts with GPIO_ACTIVE_LOW. > + regulator-always-on; > + }; > + > + sfp0: sfp { > + compatible = "sff,sfp"; > + i2c-bus = <&lpi2c3>; > + los-gpios = <&pca9534 1 GPIO_ACTIVE_HIGH>; > + maximum-power-milliwatt = <2000>; > + }; > +}; > + > +&enetc_port1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_enetc1>; > + phy-handle = <ðphy1>; > + /* > + * The required RGMII TX and RX 2ns delays are implemented directly > + * in hardware via passive delay elements on the SOM PCB. > + * No delay configuration is needed in software via PHY driver. > + */ > + phy-mode = "rgmii"; > + status = "okay"; > +}; > + > +&enetc_port2 { > + phy-mode = "10gbase-r"; > + sfp = <&sfp0>; > + status = "okay"; > +}; > + > +&flexcan1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_flexcan1>; > + status = "okay"; > +}; > + > +&lpi2c3 { > + clock-frequency = <400000>; > + pinctrl-names = "default", "gpio", "sleep"; > + pinctrl-0 = <&pinctrl_lpi2c3>; > + pinctrl-1 = <&pinctrl_lpi2c3_gpio>; > + pinctrl-2 = <&pinctrl_lpi2c3_gpio>; > + scl-gpios = <&gpio2 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + sda-gpios = <&gpio2 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > + status = "okay"; > + > + /* DS1337 RTC module */ > + rtc@68 { > + compatible = "dallas,ds1337"; > + reg = <0x68>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_rtc>; > + interrupt-parent = <&gpio5>; > + interrupts = <12 IRQ_TYPE_EDGE_FALLING>; > + wakeup-source; > + }; > + > + /* Capacitive touch controller */ > + ft5x06_ts: touchscreen@38 { Sort I2C device nodes in order of slave/unit addresses. > + compatible = "edt,edt-ft5206"; > + reg = <0x38>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_captouch>; > + reset-gpios = <&pca6408_2 4 GPIO_ACTIVE_LOW>; > + interrupt-parent = <&gpio5>; > + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; > + touchscreen-size-x = <800>; > + touchscreen-size-y = <480>; > + touchscreen-inverted-x; > + touchscreen-inverted-y; > + wakeup-source; > + }; > + > + pca9534: gpio@22 { > + compatible = "nxp,pca9534"; > + reg = <0x22>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&gpio5>; > + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; > + > + pcie2-sel-hog { > + gpio-hog; > + gpios = <6 GPIO_ACTIVE_HIGH>; > + output-low; > + line-name = "pcie-clk-sw"; > + }; > + > + sfp-sel-hog { > + gpio-hog; > + gpios = <5 GPIO_ACTIVE_HIGH>; > + output-high; > + line-name = "sfp-sw"; > + }; > + }; > + > + typec@3d { > + compatible = "nxp,ptn5150"; > + reg = <0x3d>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ptn5150>; > + interrupt-parent = <&gpio5>; > + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; > + > + port { > + typec_dr_sw: endpoint { > + remote-endpoint = <&usb3_drd_sw>; > + }; > + }; > + }; > +}; > + > +&lpi2c4 { > + clock-frequency = <400000>; > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&pinctrl_lpi2c4>; > + pinctrl-1 = <&pinctrl_lpi2c4>; > + status = "okay"; > +}; > + > +&lpi2c8 { > + pca6408_1: gpio@20 { > + compatible = "nxp,pcal6408"; > + reg = <0x20>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&gpio5>; > + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; > + }; > + > + pca6408_2: gpio@21 { > + compatible = "nxp,pcal6408"; > + reg = <0x21>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&gpio5>; > + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; > + }; > + > + st33ktpm2xi2c: tpm@2e { > + compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c"; > + reg = <0x2e>; > + }; > +}; > + > +&lpspi7 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_lpspi7>; > + cs-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; > + status = "okay"; > + > + /* Resistive touch controller */ > + ads7846: touchscreen@0 { > + compatible = "ti,ads7846"; > + reg = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_restouch>; > + interrupt-parent = <&gpio2>; > + interrupts = <24 IRQ_TYPE_EDGE_FALLING>; > + pendown-gpio = <&gpio2 24 GPIO_ACTIVE_LOW>; > + spi-max-frequency = <1500000>; > + ti,x-min = /bits/ 16 <125>; > + ti,x-max = /bits/ 16 <4008>; > + ti,y-min = /bits/ 16 <282>; > + ti,y-max = /bits/ 16 <3864>; > + ti,x-plate-ohms = /bits/ 16 <180>; > + ti,pressure-max = /bits/ 16 <255>; > + ti,debounce-max = /bits/ 16 <10>; > + ti,debounce-tol = /bits/ 16 <3>; > + ti,debounce-rep = /bits/ 16 <1>; > + ti,settle-delay-usec = /bits/ 16 <150>; > + ti,keep-vref-on; > + wakeup-source; > + }; > +}; > + > +/* Console */ > +&lpuart1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart1>; > + status = "okay"; > +}; > + > +/* Header (J12.4, J12.6) */ > +&lpuart8 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart8>; > + status = "okay"; > +}; > + > +&netc_emdio { > + Nit: unneeded newline > + ethphy1: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <1>; > + reset-gpios = <&pca6408_2 0 GPIO_ACTIVE_LOW>; > + reset-assert-us = <10000>; > + reset-deassert-us = <100000>; > + > + leds { > + #address-cells = <1>; > + #size-cells = <0>; > + > + led@0 { > + reg = <0>; > + color = ; > + function = LED_FUNCTION_LAN; > + linux,default-trigger = "netdev"; > + }; > + > + led@1 { > + reg = <1>; > + color = ; > + function = LED_FUNCTION_LAN; > + linux,default-trigger = "netdev"; > + }; > + }; > + }; > +}; > + > +&pcie0 { > + reset-gpio = <&pca6408_2 3 GPIO_ACTIVE_LOW>; > + status = "okay"; > +}; > + > +&pcie1 { > + reset-gpio = <&pca6408_2 2 GPIO_ACTIVE_LOW>; > + status = "okay"; > +}; > + > +&usb2 { > + dr_mode = "host"; > + adp-disable; > + hnp-disable; > + srp-disable; > + disable-over-current; > + status = "okay"; > +}; > + > +&usb3 { > + status = "okay"; > +}; > + > +&usb3_dwc3 { > + dr_mode = "otg"; > + hnp-disable; > + srp-disable; > + adp-disable; > + usb-role-switch; > + snps,dis-u1-entry-quirk; > + snps,dis-u2-entry-quirk; > + status = "okay"; > + > + port { > + usb3_drd_sw: endpoint { > + remote-endpoint = <&typec_dr_sw>; > + }; > + }; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; Have a newline here. > + usb3_data_hs: endpoint { > + remote-endpoint = <&typec_con_hs>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + usb3_data_ss: endpoint { > + remote-endpoint = <&typec_con_ss>; > + }; > + }; > + }; > +}; > + > +&usb3_phy { > + fsl,phy-pcs-tx-deemph-3p5db-attenuation-db = <17>; > + fsl,phy-pcs-tx-swing-full-percent = <100>; > + fsl,phy-tx-preemp-amp-tune-microamp = <600>; > + fsl,phy-tx-vboost-level-microvolt = <1156>; > + status = "okay"; > +}; > + > +&usdhc2 { > + pinctrl-names = "default","state_100mhz","state_200mhz","sleep"; > + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; > + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; > + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; > + pinctrl-3 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; > + cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; > + vmmc-supply = <®_usdhc2_vmmc>; > + bus-width = <4>; > + status = "okay"; > +}; > + > +&scmi_iomuxc { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_hog>; > + > + pinctrl_hog: hoggrp { > + fsl,pins = < > + /* GPIO Expanders shared IRQ */ > + IMX95_PAD_GPIO_IO37__GPIO5_IO_BIT17 0x31e > + >; > + }; > + > + pinctrl_captouch: captouchgrp { > + fsl,pins = < > + IMX95_PAD_GPIO_IO33__GPIO5_IO_BIT13 0x31e > + >; > + }; > + > + pinctrl_enetc1: enetc1grp { > + fsl,pins = < > + IMX95_PAD_ENET2_TXC__NETCMIX_TOP_ETH1_RGMII_TX_CLK 0x57e > + IMX95_PAD_ENET2_TX_CTL__NETCMIX_TOP_ETH1_RGMII_TX_CTL 0x57e > + IMX95_PAD_ENET2_TD3__NETCMIX_TOP_ETH1_RGMII_TD3 0x57e > + IMX95_PAD_ENET2_TD2__NETCMIX_TOP_ETH1_RGMII_TD2 0x57e > + IMX95_PAD_ENET2_TD1__NETCMIX_TOP_ETH1_RGMII_TD1 0x57e > + IMX95_PAD_ENET2_TD0__NETCMIX_TOP_ETH1_RGMII_TD0 0x57e > + IMX95_PAD_ENET2_RXC__NETCMIX_TOP_ETH1_RGMII_RX_CLK 0x57e > + IMX95_PAD_ENET2_RX_CTL__NETCMIX_TOP_ETH1_RGMII_RX_CTL 0x57e > + IMX95_PAD_ENET2_RD0__NETCMIX_TOP_ETH1_RGMII_RD0 0x57e > + IMX95_PAD_ENET2_RD1__NETCMIX_TOP_ETH1_RGMII_RD1 0x57e > + IMX95_PAD_ENET2_RD2__NETCMIX_TOP_ETH1_RGMII_RD2 0x57e > + IMX95_PAD_ENET2_RD3__NETCMIX_TOP_ETH1_RGMII_RD3 0x37e /* Enable pull-up to strap MXL86110 MDIO address */ Maybe avoid a very long line like: /* Enable pull-up to strap MXL86110 MDIO address */ IMX95_PAD_ENET2_RD3__NETCMIX_TOP_ETH1_RGMII_RD3 0x37e Shawn > + >; > + }; > + > + pinctrl_flexcan1: flexcan1grp { > + fsl,pins = < > + IMX95_PAD_PDM_CLK__AONMIX_TOP_CAN1_TX 0x39e > + IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_CAN1_RX 0x39e > + >; > + }; > + > + pinctrl_gpio_leds: ledgrp { > + fsl,pins = < > + IMX95_PAD_CCM_CLKO2__GPIO3_IO_BIT27 0x31e > + >; > + }; > + > + pinctrl_lpi2c3: lpi2c3grp { > + fsl,pins = < > + IMX95_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e > + IMX95_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e > + >; > + }; > + > + pinctrl_lpi2c3_gpio: lpi2c3gpiogrp { > + fsl,pins = < > + IMX95_PAD_GPIO_IO28__GPIO2_IO_BIT28 0x31e > + IMX95_PAD_GPIO_IO29__GPIO2_IO_BIT29 0x31e > + >; > + }; > + > + pinctrl_lpi2c4: lpi2c4grp { > + fsl,pins = < > + IMX95_PAD_GPIO_IO30__LPI2C4_SDA 0x40000b9e > + IMX95_PAD_GPIO_IO31__LPI2C4_SCL 0x40000b9e > + >; > + }; > + > + pinctrl_lpspi7: lpspi7grp { > + fsl,pins = < > + IMX95_PAD_GPIO_IO04__GPIO2_IO_BIT4 0x3fe /* j16.4 ADS7846 */ > + IMX95_PAD_UART2_TXD__AONMIX_TOP_GPIO1_IO_BIT7 0x3fe /* j14.4 MCP2518FDT */ > + IMX95_PAD_XSPI1_DATA4__GPIO5_IO_BIT4 0x3fe /* j25.2 spidev */ > + IMX95_PAD_GPIO_IO05__LPSPI7_SIN 0x3fe > + IMX95_PAD_GPIO_IO06__LPSPI7_SOUT 0x3fe > + IMX95_PAD_GPIO_IO07__LPSPI7_SCK 0x3fe > + >; > + }; > + > + pinctrl_ptn5150: ptn5150grp { > + fsl,pins = < > + IMX95_PAD_GPIO_IO34__GPIO5_IO_BIT14 0x31e > + >; > + }; > + > + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { > + fsl,pins = < > + IMX95_PAD_SD2_RESET_B__GPIO3_IO_BIT7 0x31e > + >; > + }; > + > + pinctrl_restouch: restouchgrp { > + fsl,pins = < > + IMX95_PAD_GPIO_IO24__GPIO2_IO_BIT24 0x31e > + >; > + }; > + > + pinctrl_rtc: rtcgrp { > + fsl,pins = < > + IMX95_PAD_GPIO_IO32__GPIO5_IO_BIT12 0x31e > + >; > + }; > + > + pinctrl_uart1: uart1grp { > + fsl,pins = < > + IMX95_PAD_UART1_RXD__AONMIX_TOP_LPUART1_RX 0x31e > + IMX95_PAD_UART1_TXD__AONMIX_TOP_LPUART1_TX 0x31e > + >; > + }; > + > + pinctrl_uart8: uart8grp { > + fsl,pins = < > + IMX95_PAD_GPIO_IO13__LPUART8_RX 0x31e > + IMX95_PAD_GPIO_IO12__LPUART8_TX 0x31e > + >; > + }; > + > + pinctrl_usdhc2_gpio: usdhc2gpiogrp { > + fsl,pins = < > + IMX95_PAD_SD2_CD_B__GPIO3_IO_BIT0 0x31e > + >; > + }; > + > + pinctrl_usdhc2: usdhc2grp { > + fsl,pins = < > + IMX95_PAD_SD2_CLK__USDHC2_CLK 0x158e > + IMX95_PAD_SD2_CMD__USDHC2_CMD 0x138e > + IMX95_PAD_SD2_DATA0__USDHC2_DATA0 0x138e > + IMX95_PAD_SD2_DATA1__USDHC2_DATA1 0x138e > + IMX95_PAD_SD2_DATA2__USDHC2_DATA2 0x138e > + IMX95_PAD_SD2_DATA3__USDHC2_DATA3 0x138e > + IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e > + >; > + }; > + > + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { > + fsl,pins = < > + IMX95_PAD_SD2_CLK__USDHC2_CLK 0x158e > + IMX95_PAD_SD2_CMD__USDHC2_CMD 0x138e > + IMX95_PAD_SD2_DATA0__USDHC2_DATA0 0x138e > + IMX95_PAD_SD2_DATA1__USDHC2_DATA1 0x138e > + IMX95_PAD_SD2_DATA2__USDHC2_DATA2 0x138e > + IMX95_PAD_SD2_DATA3__USDHC2_DATA3 0x138e > + IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e > + >; > + }; > + > + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { > + fsl,pins = < > + IMX95_PAD_SD2_CLK__USDHC2_CLK 0x15fe > + IMX95_PAD_SD2_CMD__USDHC2_CMD 0x13fe > + IMX95_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe > + IMX95_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe > + IMX95_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe > + IMX95_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe > + IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e > + >; > + }; > +}; > -- > 2.47.3 >