From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B55EDECD989 for ; Thu, 5 Feb 2026 16:55:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=T8FjwsK58w5yf0+Auy2LXCi1+BpK2jBsRpT0IgWnkBw=; b=0h2ol6K/5u+AfFWUMxbYtgCp02 wLjS63cs0Y2vYILdrAYkLRId736TQ7OT2DoYiGawa97t3p6FXqHoXY7638awjvadgv2tHyl/pdJVR c/ol0U4VtDFO8kcYgkNebn909igYdgxLmRxppp12+1zQIbfXFEFN+qKdGJOGAdZQ2MZmmqsiop7Ob YJvoKluYcsloQOxawCYOOki3EluUDabtJpNNy20C0whwlqXgzN8woIYZwmd/Nco/Uw/iPFX56wFFD FMiBVy1F1W/GtbEmPQ16PT+zR2iROY2s0Kh7Y7/j/bQs+UMxf7IGeRzk8paJjeyTchUdG8LxmH7Jd 4Qseti7A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vo2dZ-0000000AFnz-1Ag3; Thu, 05 Feb 2026 16:55:26 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vo2dW-0000000AFmx-2COh for linux-arm-kernel@lists.infradead.org; Thu, 05 Feb 2026 16:55:23 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9248A339; Thu, 5 Feb 2026 08:55:15 -0800 (PST) Received: from arm.com (arrakis.cambridge.arm.com [10.1.197.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 274163F778; Thu, 5 Feb 2026 08:55:16 -0800 (PST) Date: Thu, 5 Feb 2026 16:55:13 +0000 From: Catalin Marinas To: Ben Horgan Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, will@kernel.org, corbet@lwn.net, maz@kernel.org, oupton@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, kvmarm@lists.linux.dev, zengheng4@huawei.com, linux-doc@vger.kernel.org, Shaopeng Tan Subject: Re: [PATCH v4 09/41] arm64: mpam: Initialise and context switch the MPAMSM_EL1 register Message-ID: References: <20260203214342.584712-1-ben.horgan@arm.com> <20260203214342.584712-10-ben.horgan@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260203214342.584712-10-ben.horgan@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260205_085522_601970_AFE1A2A7 X-CRM114-Status: GOOD ( 16.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Feb 03, 2026 at 09:43:10PM +0000, Ben Horgan wrote: > The MPAMSM_EL1 sets the MPAM labels, PMG and PARTID, for loads and stores > generated by a shared SMCU. Disable the traps so the kernel can use it and > set it to the same configuration as the per-EL cpu MPAM configuration. > > If an SMCU is not shared with other cpus then it is implementation > defined whether the configuration from MPAMSM_EL1 is used or that from > the appropriate MPAMy_ELx. As we set the same, PMG_D and PARTID_D, > configuration for MPAM0_EL1, MPAM1_EL1 and MPAMSM_EL1 the resulting > configuration is the same regardless. > > The range of valid configurations for the PARTID and PMG in MPAMSM_EL1 is > not currently specified in Arm Architectural Reference Manual but the > architect has confirmed that it is intended to be the same as that for the > cpu configuration in the MPAMy_ELx registers. > > Tested-by: Gavin Shan > Tested-by: Shaopeng Tan > Tested-by: Peter Newman > Reviewed-by: Jonathan Cameron > Reviewed-by: Gavin Shan > Signed-off-by: Ben Horgan Reviewed-by: Catalin Marinas