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Wed, 25 Feb 2026 16:18:55 -0800 (PST) Received: from geday ([2804:7f2:800b:f14d::dead:c001]) by smtp.gmail.com with ESMTPSA id ada2fe7eead31-5ff1ea6ea19sm612107137.12.2026.02.25.16.18.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Feb 2026 16:18:54 -0800 (PST) Date: Wed, 25 Feb 2026 21:18:48 -0300 From: Geraldo Nascimento To: Bjorn Helgaas Cc: Shawn Lin , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Dragan Simic , linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 2/2] PCI: rockchip-host: comment danger of 5.0 GT/s speed Message-ID: References: <8db835ffe384db63ee598a203751b298ad1cc267.1772057799.git.geraldogabriel@gmail.com> <20260226001229.GA3794668@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260226001229.GA3794668@bhelgaas> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260225_161857_084440_34DCD404 X-CRM114-Status: GOOD ( 28.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Feb 25, 2026 at 06:12:29PM -0600, Bjorn Helgaas wrote: > On Wed, Feb 25, 2026 at 07:27:44PM -0300, Geraldo Nascimento wrote: > > According to Rockchip sources, there is grave danger in enabling 5.0 > > GT/s speed for this core. Add a comment documenting this risk of > > "catastrophic failure" and discouraging end-users from forcing > > higher speed. > > A comment in the code might be useful but doesn't discourage end > users. Hi Bjorn, thanks for the quick review. > > > Link: https://lore.kernel.org/all/ffd05070-9879-4468-94e3-b88968b4c21b@rock-chips.com/ > > Cc: stable@vger.kernel.org > > Reported-by: Dragan Simic > > Reported-by: Shawn Lin > > Reviewed-by: Dragan Simic > > Signed-off-by: Geraldo Nascimento > > --- > > drivers/pci/controller/pcie-rockchip-host.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c > > index ee1822ca01db..4faf3e29b7d5 100644 > > --- a/drivers/pci/controller/pcie-rockchip-host.c > > +++ b/drivers/pci/controller/pcie-rockchip-host.c > > @@ -332,6 +332,10 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip) > > /* > > * Enable retrain for gen2. This should be configured only after > > * gen1 finished. > > + * > > + * Dangerous and may lead to "catastrophic failure", with data loss > > + * or worse! > > + * > > Wrap comment to fit in 80 columns like the rest of the file. > > Remove spurious blank line at end. > > This should probably be squashed with the first patch; I don't see the > benefit of having them separate. > > Why don't we just remove this whole "link_gen == 2" block? If we > don't want to use it, there's no point in keeping the code. Yes, I think I'll go with this second option and remove the code block outright. Thanks, Geraldo Nascimento > > > */ > > status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_CR + PCI_EXP_LNKCTL2); > > status &= ~PCI_EXP_LNKCTL2_TLS; > > -- > > 2.52.0 > > > > > > _______________________________________________ > > Linux-rockchip mailing list > > Linux-rockchip@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-rockchip