Re: fs/crypto/bio.c:67:17: sparse: sparse: cast to restricted blk_status_t

[Catalin Marinas <catalin.marinas@arm.com>]

On Tue, Feb 24, 2026 at 03:55:28PM +0100, Christoph Hellwig wrote:
> On Mon, Feb 23, 2026 at 09:23:07AM +0800, kernel test robot wrote:
> > tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> > head:   6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f
> > commit: bc26e2efa2c5bb9289fa894834446840dea0bc31 fscrypt: keep multiple bios in flight in fscrypt_zeroout_range_inline_crypt
> > date:   6 weeks ago
> > config: arm64-randconfig-r134-20260223 (https://download.01.org/0day-ci/archive/20260223/202602230947.uNRsPyBn-lkp@intel.com/config)
> > compiler: clang version 23.0.0git (https://github.com/llvm/llvm-project d8f778935a5bf8a173a3c1d886fd736a4ef6cf05)
> > reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260223/202602230947.uNRsPyBn-lkp@intel.com/reproduce)
> > 
> > If you fix the issue in a separate patch/commit (i.e. not just a new version of
> > the same patch/commit), kindly add following tags
> > | Reported-by: kernel test robot <lkp@intel.com>
> > | Closes: https://lore.kernel.org/oe-kbuild-all/202602230947.uNRsPyBn-lkp@intel.com/
> > 
> > sparse warnings: (new ones prefixed by >>)
> >    fs/crypto/bio.c:67:17: sparse: sparse: cast from restricted blk_status_t
> > >> fs/crypto/bio.c:67:17: sparse: sparse: cast to restricted blk_status_t
> > 
> > vim +67 fs/crypto/bio.c
> > 
> >     61	
> >     62	static void fscrypt_zeroout_range_end_io(struct bio *bio)
> >     63	{
> >     64		struct fscrypt_zero_done *done = bio->bi_private;
> >     65	
> >     66		if (bio->bi_status)
> >   > 67			cmpxchg(&done->status, 0, bio->bi_status);
> >     68		fscrypt_zeroout_range_done(done);
> >     69		bio_put(bio);
> >     70	}
> >     71	
> 
> It looks like some arm64 configs generate sparse warnings when using
> cmpxchg on __bitwise types.  Any chance I could prod the arm64 maintainers
> into looking into this?

It looks like sparse doesn't like the __bitwise cast to unsigned long in
the arm64 cmxchg code. We could force the type cast, not sure whether it
hides any real issues. Another option is to do the force cast in bio.c
but I don't think that code is doing anything wrong:

diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h
index d7a540736741..6cf3cd6873f5 100644
--- a/arch/arm64/include/asm/cmpxchg.h
+++ b/arch/arm64/include/asm/cmpxchg.h
@@ -91,8 +91,9 @@ __XCHG_GEN(_mb)
 #define __xchg_wrapper(sfx, ptr, x)					\
 ({									\
 	__typeof__(*(ptr)) __ret;					\
-	__ret = (__typeof__(*(ptr)))					\
-		__arch_xchg##sfx((unsigned long)(x), (ptr), sizeof(*(ptr))); \
+	__ret = (__force __typeof__(*(ptr)))				\
+		__arch_xchg##sfx((__force unsigned long)(x), (ptr),	\
+				  sizeof(*(ptr)));			\
 	__ret;								\
 })
 
@@ -175,9 +176,10 @@ __CMPXCHG_GEN(_mb)
 #define __cmpxchg_wrapper(sfx, ptr, o, n)				\
 ({									\
 	__typeof__(*(ptr)) __ret;					\
-	__ret = (__typeof__(*(ptr)))					\
-		__cmpxchg##sfx((ptr), (unsigned long)(o),		\
-				(unsigned long)(n), sizeof(*(ptr)));	\
+	__ret = (__force __typeof__(*(ptr)))				\
+		__cmpxchg##sfx((ptr), (__force unsigned long)(o),	\
+				(__force unsigned long)(n),		\
+				sizeof(*(ptr)));			\
 	__ret;								\
 })
 

-- 
Catalin