* [PATCH v7 1/9] PCI: endpoint: Describe reserved subregions within BARs
2026-02-15 16:38 [PATCH v7 0/9] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback Koichiro Den
@ 2026-02-15 16:38 ` Koichiro Den
2026-02-15 16:38 ` [PATCH v7 2/9] PCI: dw-rockchip: Describe RK3588 BAR4 DMA ctrl window Koichiro Den
` (7 subsequent siblings)
8 siblings, 0 replies; 21+ messages in thread
From: Koichiro Den @ 2026-02-15 16:38 UTC (permalink / raw)
To: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin, Frank.Li
Cc: linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
Some endpoint controllers expose platform-owned, fixed register windows
within a BAR that EPF drivers must not reprogram (e.g. a BAR marked
BAR_RESERVED). Even in that case, EPF drivers may need to reference a
well-defined subset of that BAR, e.g. to reuse an integrated DMA
controller MMIO window as a doorbell target.
Introduce struct pci_epc_bar_rsvd_region and extend struct
pci_epc_bar_desc so EPC drivers can advertise such fixed subregions in a
controller-agnostic way.
No functional change for existing users.
Signed-off-by: Koichiro Den <den@valinux.co.jp>
---
include/linux/pci-epc.h | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
index c021c7af175f..7a87f5962dd0 100644
--- a/include/linux/pci-epc.h
+++ b/include/linux/pci-epc.h
@@ -200,6 +200,30 @@ enum pci_epc_bar_type {
BAR_RESERVED,
};
+/**
+ * enum pci_epc_bar_rsvd_region_type - type of a fixed subregion behind a BAR
+ * @PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO: Integrated DMA controller MMIO window
+ *
+ * BARs marked BAR_RESERVED are owned by the SoC/EPC hardware and must not be
+ * reprogrammed by EPF drivers. Some of them still expose fixed subregions that
+ * EPFs may want to reference (e.g. embedded doorbell fallback).
+ */
+enum pci_epc_bar_rsvd_region_type {
+ PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO = 0,
+};
+
+/**
+ * struct pci_epc_bar_rsvd_region - fixed subregion behind a BAR
+ * @type: reserved region type
+ * @offset: offset within the BAR aperture
+ * @size: size of the reserved region
+ */
+struct pci_epc_bar_rsvd_region {
+ enum pci_epc_bar_rsvd_region_type type;
+ resource_size_t offset;
+ resource_size_t size;
+};
+
/**
* struct pci_epc_bar_desc - hardware description for a BAR
* @type: the type of the BAR
@@ -213,11 +237,15 @@ enum pci_epc_bar_type {
* (If BARx is a 64-bit BAR that an EPF driver is not allowed to
* touch, then both BARx and BARx+1 must be set to type
* BAR_RESERVED.)
+ * @nr_rsvd_regions: number of fixed subregions described for BAR_RESERVED
+ * @rsvd_regions: fixed subregions behind BAR_RESERVED
*/
struct pci_epc_bar_desc {
enum pci_epc_bar_type type;
u64 fixed_size;
bool only_64bit;
+ u8 nr_rsvd_regions;
+ const struct pci_epc_bar_rsvd_region *rsvd_regions;
};
/**
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v7 2/9] PCI: dw-rockchip: Describe RK3588 BAR4 DMA ctrl window
2026-02-15 16:38 [PATCH v7 0/9] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback Koichiro Den
2026-02-15 16:38 ` [PATCH v7 1/9] PCI: endpoint: Describe reserved subregions within BARs Koichiro Den
@ 2026-02-15 16:38 ` Koichiro Den
2026-02-15 16:38 ` [PATCH v7 3/9] PCI: endpoint: Add auxiliary resource query API Koichiro Den
` (6 subsequent siblings)
8 siblings, 0 replies; 21+ messages in thread
From: Koichiro Den @ 2026-02-15 16:38 UTC (permalink / raw)
To: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin, Frank.Li
Cc: linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
On RK3588 PCIe3_4L in EP mode, the integrated DMA controller registers
are permanently mapped to BAR4 and must not be repurposed by EPF
drivers.
When the remote peer needs to access these registers, it must use the
fixed BAR4 window instead of creating another inbound mapping in a
different BAR. Mixing the fixed window with an additional mapping can
lead to incorrect behavior.
Advertise the DMA controller MMIO window as a reserved BAR subregion so
EPF drivers can reuse it safely.
Signed-off-by: Koichiro Den <den@valinux.co.jp>
---
drivers/pci/controller/dwc/pcie-dw-rockchip.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
index 5b17da63151d..ecc28093c589 100644
--- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
@@ -403,6 +403,15 @@ static const struct pci_epc_features rockchip_pcie_epc_features_rk3568 = {
.bar[BAR_5] = { .type = BAR_RESIZABLE, },
};
+static const struct pci_epc_bar_rsvd_region rk3588_bar4_rsvd[] = {
+ {
+ /* DMA_CAP (BAR4: DMA Port Logic Structure) */
+ .type = PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO,
+ .offset = 0x0,
+ .size = 0x2000,
+ },
+};
+
/*
* BAR4 on rk3588 exposes the ATU Port Logic Structure to the host regardless of
* iATU settings for BAR4. This means that BAR4 cannot be used by an EPF driver,
@@ -420,7 +429,11 @@ static const struct pci_epc_features rockchip_pcie_epc_features_rk3588 = {
.bar[BAR_1] = { .type = BAR_RESIZABLE, },
.bar[BAR_2] = { .type = BAR_RESIZABLE, },
.bar[BAR_3] = { .type = BAR_RESIZABLE, },
- .bar[BAR_4] = { .type = BAR_RESERVED, },
+ .bar[BAR_4] = {
+ .type = BAR_RESERVED,
+ .nr_rsvd_regions = ARRAY_SIZE(rk3588_bar4_rsvd),
+ .rsvd_regions = rk3588_bar4_rsvd,
+ },
.bar[BAR_5] = { .type = BAR_RESIZABLE, },
};
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v7 3/9] PCI: endpoint: Add auxiliary resource query API
2026-02-15 16:38 [PATCH v7 0/9] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback Koichiro Den
2026-02-15 16:38 ` [PATCH v7 1/9] PCI: endpoint: Describe reserved subregions within BARs Koichiro Den
2026-02-15 16:38 ` [PATCH v7 2/9] PCI: dw-rockchip: Describe RK3588 BAR4 DMA ctrl window Koichiro Den
@ 2026-02-15 16:38 ` Koichiro Den
2026-02-16 15:56 ` Frank Li
2026-02-15 16:38 ` [PATCH v7 4/9] PCI: dwc: Record integrated eDMA register window Koichiro Den
` (5 subsequent siblings)
8 siblings, 1 reply; 21+ messages in thread
From: Koichiro Den @ 2026-02-15 16:38 UTC (permalink / raw)
To: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin, Frank.Li
Cc: linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
Endpoint controller drivers may integrate auxiliary blocks (e.g. DMA
engines) whose register windows and descriptor memories metadata need to
be exposed to a remote peer. Endpoint function drivers need a generic
way to discover such resources without hard-coding controller-specific
helpers.
Add pci_epc_get_aux_resources() and the corresponding pci_epc_ops
get_aux_resources() callback. The API returns a list of resources
described by type, physical address and size, plus type-specific
metadata.
Passing resources == NULL (or num_resources == 0) returns the required
number of entries.
Signed-off-by: Koichiro Den <den@valinux.co.jp>
---
drivers/pci/endpoint/pci-epc-core.c | 41 +++++++++++++++++++++++
include/linux/pci-epc.h | 51 +++++++++++++++++++++++++++++
2 files changed, 92 insertions(+)
diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c
index 068155819c57..01de4bd5047a 100644
--- a/drivers/pci/endpoint/pci-epc-core.c
+++ b/drivers/pci/endpoint/pci-epc-core.c
@@ -155,6 +155,47 @@ const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc,
}
EXPORT_SYMBOL_GPL(pci_epc_get_features);
+/**
+ * pci_epc_get_aux_resources() - query EPC-provided auxiliary resources
+ * @epc: EPC device
+ * @func_no: function number
+ * @vfunc_no: virtual function number
+ * @resources: output array (may be NULL to query required count)
+ * @num_resources: size of @resources array in entries (0 when querying count)
+ *
+ * Some EPC backends integrate auxiliary blocks (e.g. DMA engines) whose control
+ * registers and/or descriptor memories can be exposed to the host by mapping
+ * them into BAR space. This helper queries the backend for such resources.
+ *
+ * Return:
+ * * >= 0: number of resources returned (or required, if @resources is NULL)
+ * * -EOPNOTSUPP: backend does not support auxiliary resource queries
+ * * other -errno on failure
+ */
+int pci_epc_get_aux_resources(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
+ struct pci_epc_aux_resource *resources,
+ int num_resources)
+{
+ int ret;
+
+ if (!epc || !epc->ops)
+ return -EINVAL;
+
+ if (func_no >= epc->max_functions)
+ return -EINVAL;
+
+ if (!epc->ops->get_aux_resources)
+ return -EOPNOTSUPP;
+
+ mutex_lock(&epc->lock);
+ ret = epc->ops->get_aux_resources(epc, func_no, vfunc_no, resources,
+ num_resources);
+ mutex_unlock(&epc->lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pci_epc_get_aux_resources);
+
/**
* pci_epc_stop() - stop the PCI link
* @epc: the link of the EPC device that has to be stopped
diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
index 7a87f5962dd0..fd79784b31db 100644
--- a/include/linux/pci-epc.h
+++ b/include/linux/pci-epc.h
@@ -61,6 +61,50 @@ struct pci_epc_map {
void __iomem *virt_addr;
};
+/**
+ * enum pci_epc_aux_resource_type - auxiliary resource type identifiers
+ * @PCI_EPC_AUX_DMA_CTRL_MMIO: Integrated DMA controller register window (MMIO)
+ * @PCI_EPC_AUX_DMA_CHAN_DESC: Per-channel DMA descriptor
+ * @PCI_EPC_AUX_DOORBELL_MMIO: Doorbell MMIO, that might be outside the DMA
+ * controller register window
+ *
+ * EPC backends may expose auxiliary blocks (e.g. DMA engines) by mapping their
+ * register windows and descriptor memories into BAR space. This enum
+ * identifies the type of each exposable resource.
+ */
+enum pci_epc_aux_resource_type {
+ PCI_EPC_AUX_DMA_CTRL_MMIO,
+ PCI_EPC_AUX_DMA_CHAN_DESC,
+ PCI_EPC_AUX_DOORBELL_MMIO,
+};
+
+/**
+ * struct pci_epc_aux_resource - a physical auxiliary resource that may be
+ * exposed for peer use
+ * @type: resource type, see enum pci_epc_aux_resource_type
+ * @phys_addr: physical base address of the resource
+ * @size: size of the resource in bytes
+ * @bar: BAR number where this resource is already exposed to the RC
+ * (NO_BAR if not)
+ * @bar_offset: offset within @bar where the resource starts (valid iff
+ * @bar != NO_BAR)
+ * @u: type-specific metadata
+ */
+struct pci_epc_aux_resource {
+ enum pci_epc_aux_resource_type type;
+ phys_addr_t phys_addr;
+ resource_size_t size;
+ enum pci_barno bar;
+ resource_size_t bar_offset;
+
+ union {
+ /* PCI_EPC_AUX_DOORBELL_MMIO */
+ struct {
+ int irq;
+ } db_mmio;
+ } u;
+};
+
/**
* struct pci_epc_ops - set of function pointers for performing EPC operations
* @write_header: ops to populate configuration space header
@@ -84,6 +128,7 @@ struct pci_epc_map {
* @start: ops to start the PCI link
* @stop: ops to stop the PCI link
* @get_features: ops to get the features supported by the EPC
+ * @get_aux_resources: ops to retrieve controller-owned auxiliary resources
* @owner: the module owner containing the ops
*/
struct pci_epc_ops {
@@ -115,6 +160,9 @@ struct pci_epc_ops {
void (*stop)(struct pci_epc *epc);
const struct pci_epc_features* (*get_features)(struct pci_epc *epc,
u8 func_no, u8 vfunc_no);
+ int (*get_aux_resources)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
+ struct pci_epc_aux_resource *resources,
+ int num_resources);
struct module *owner;
};
@@ -337,6 +385,9 @@ int pci_epc_start(struct pci_epc *epc);
void pci_epc_stop(struct pci_epc *epc);
const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc,
u8 func_no, u8 vfunc_no);
+int pci_epc_get_aux_resources(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
+ struct pci_epc_aux_resource *resources,
+ int num_resources);
enum pci_barno
pci_epc_get_first_free_bar(const struct pci_epc_features *epc_features);
enum pci_barno pci_epc_get_next_free_bar(const struct pci_epc_features
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v7 3/9] PCI: endpoint: Add auxiliary resource query API
2026-02-15 16:38 ` [PATCH v7 3/9] PCI: endpoint: Add auxiliary resource query API Koichiro Den
@ 2026-02-16 15:56 ` Frank Li
0 siblings, 0 replies; 21+ messages in thread
From: Frank Li @ 2026-02-16 15:56 UTC (permalink / raw)
To: Koichiro Den
Cc: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin,
linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
On Mon, Feb 16, 2026 at 01:38:41AM +0900, Koichiro Den wrote:
> Endpoint controller drivers may integrate auxiliary blocks (e.g. DMA
> engines) whose register windows and descriptor memories metadata need to
> be exposed to a remote peer. Endpoint function drivers need a generic
> way to discover such resources without hard-coding controller-specific
> helpers.
>
> Add pci_epc_get_aux_resources() and the corresponding pci_epc_ops
> get_aux_resources() callback. The API returns a list of resources
> described by type, physical address and size, plus type-specific
> metadata.
>
> Passing resources == NULL (or num_resources == 0) returns the required
> number of entries.
>
> Signed-off-by: Koichiro Den <den@valinux.co.jp>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> drivers/pci/endpoint/pci-epc-core.c | 41 +++++++++++++++++++++++
> include/linux/pci-epc.h | 51 +++++++++++++++++++++++++++++
> 2 files changed, 92 insertions(+)
>
> diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c
> index 068155819c57..01de4bd5047a 100644
> --- a/drivers/pci/endpoint/pci-epc-core.c
> +++ b/drivers/pci/endpoint/pci-epc-core.c
> @@ -155,6 +155,47 @@ const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc,
> }
> EXPORT_SYMBOL_GPL(pci_epc_get_features);
>
> +/**
> + * pci_epc_get_aux_resources() - query EPC-provided auxiliary resources
> + * @epc: EPC device
> + * @func_no: function number
> + * @vfunc_no: virtual function number
> + * @resources: output array (may be NULL to query required count)
> + * @num_resources: size of @resources array in entries (0 when querying count)
> + *
> + * Some EPC backends integrate auxiliary blocks (e.g. DMA engines) whose control
> + * registers and/or descriptor memories can be exposed to the host by mapping
> + * them into BAR space. This helper queries the backend for such resources.
> + *
> + * Return:
> + * * >= 0: number of resources returned (or required, if @resources is NULL)
> + * * -EOPNOTSUPP: backend does not support auxiliary resource queries
> + * * other -errno on failure
> + */
> +int pci_epc_get_aux_resources(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
> + struct pci_epc_aux_resource *resources,
> + int num_resources)
> +{
> + int ret;
> +
> + if (!epc || !epc->ops)
> + return -EINVAL;
> +
> + if (func_no >= epc->max_functions)
> + return -EINVAL;
> +
> + if (!epc->ops->get_aux_resources)
> + return -EOPNOTSUPP;
> +
> + mutex_lock(&epc->lock);
> + ret = epc->ops->get_aux_resources(epc, func_no, vfunc_no, resources,
> + num_resources);
> + mutex_unlock(&epc->lock);
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(pci_epc_get_aux_resources);
> +
> /**
> * pci_epc_stop() - stop the PCI link
> * @epc: the link of the EPC device that has to be stopped
> diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
> index 7a87f5962dd0..fd79784b31db 100644
> --- a/include/linux/pci-epc.h
> +++ b/include/linux/pci-epc.h
> @@ -61,6 +61,50 @@ struct pci_epc_map {
> void __iomem *virt_addr;
> };
>
> +/**
> + * enum pci_epc_aux_resource_type - auxiliary resource type identifiers
> + * @PCI_EPC_AUX_DMA_CTRL_MMIO: Integrated DMA controller register window (MMIO)
> + * @PCI_EPC_AUX_DMA_CHAN_DESC: Per-channel DMA descriptor
> + * @PCI_EPC_AUX_DOORBELL_MMIO: Doorbell MMIO, that might be outside the DMA
> + * controller register window
> + *
> + * EPC backends may expose auxiliary blocks (e.g. DMA engines) by mapping their
> + * register windows and descriptor memories into BAR space. This enum
> + * identifies the type of each exposable resource.
> + */
> +enum pci_epc_aux_resource_type {
> + PCI_EPC_AUX_DMA_CTRL_MMIO,
> + PCI_EPC_AUX_DMA_CHAN_DESC,
> + PCI_EPC_AUX_DOORBELL_MMIO,
> +};
> +
> +/**
> + * struct pci_epc_aux_resource - a physical auxiliary resource that may be
> + * exposed for peer use
> + * @type: resource type, see enum pci_epc_aux_resource_type
> + * @phys_addr: physical base address of the resource
> + * @size: size of the resource in bytes
> + * @bar: BAR number where this resource is already exposed to the RC
> + * (NO_BAR if not)
> + * @bar_offset: offset within @bar where the resource starts (valid iff
> + * @bar != NO_BAR)
> + * @u: type-specific metadata
> + */
> +struct pci_epc_aux_resource {
> + enum pci_epc_aux_resource_type type;
> + phys_addr_t phys_addr;
> + resource_size_t size;
> + enum pci_barno bar;
> + resource_size_t bar_offset;
> +
> + union {
> + /* PCI_EPC_AUX_DOORBELL_MMIO */
> + struct {
> + int irq;
> + } db_mmio;
> + } u;
> +};
> +
> /**
> * struct pci_epc_ops - set of function pointers for performing EPC operations
> * @write_header: ops to populate configuration space header
> @@ -84,6 +128,7 @@ struct pci_epc_map {
> * @start: ops to start the PCI link
> * @stop: ops to stop the PCI link
> * @get_features: ops to get the features supported by the EPC
> + * @get_aux_resources: ops to retrieve controller-owned auxiliary resources
> * @owner: the module owner containing the ops
> */
> struct pci_epc_ops {
> @@ -115,6 +160,9 @@ struct pci_epc_ops {
> void (*stop)(struct pci_epc *epc);
> const struct pci_epc_features* (*get_features)(struct pci_epc *epc,
> u8 func_no, u8 vfunc_no);
> + int (*get_aux_resources)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
> + struct pci_epc_aux_resource *resources,
> + int num_resources);
> struct module *owner;
> };
>
> @@ -337,6 +385,9 @@ int pci_epc_start(struct pci_epc *epc);
> void pci_epc_stop(struct pci_epc *epc);
> const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc,
> u8 func_no, u8 vfunc_no);
> +int pci_epc_get_aux_resources(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
> + struct pci_epc_aux_resource *resources,
> + int num_resources);
> enum pci_barno
> pci_epc_get_first_free_bar(const struct pci_epc_features *epc_features);
> enum pci_barno pci_epc_get_next_free_bar(const struct pci_epc_features
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v7 4/9] PCI: dwc: Record integrated eDMA register window
2026-02-15 16:38 [PATCH v7 0/9] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback Koichiro Den
` (2 preceding siblings ...)
2026-02-15 16:38 ` [PATCH v7 3/9] PCI: endpoint: Add auxiliary resource query API Koichiro Den
@ 2026-02-15 16:38 ` Koichiro Den
2026-02-15 16:38 ` [PATCH v7 5/9] PCI: dwc: ep: Expose integrated eDMA resources via EPC aux-resource API Koichiro Den
` (4 subsequent siblings)
8 siblings, 0 replies; 21+ messages in thread
From: Koichiro Den @ 2026-02-15 16:38 UTC (permalink / raw)
To: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin, Frank.Li
Cc: linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
Some DesignWare PCIe controllers integrate an eDMA block whose registers
are located in a dedicated register window. Endpoint function drivers
may need the physical base and size of this window to map/expose it to a
peer.
Record the physical base and size of the integrated eDMA register window
in struct dw_pcie.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Koichiro Den <den@valinux.co.jp>
---
drivers/pci/controller/dwc/pcie-designware.c | 4 ++++
drivers/pci/controller/dwc/pcie-designware.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 5741c09dde7f..f82ed189f6ae 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -162,8 +162,12 @@ int dw_pcie_get_resources(struct dw_pcie *pci)
pci->edma.reg_base = devm_ioremap_resource(pci->dev, res);
if (IS_ERR(pci->edma.reg_base))
return PTR_ERR(pci->edma.reg_base);
+ pci->edma_reg_phys = res->start;
+ pci->edma_reg_size = resource_size(res);
} else if (pci->atu_size >= 2 * DEFAULT_DBI_DMA_OFFSET) {
pci->edma.reg_base = pci->atu_base + DEFAULT_DBI_DMA_OFFSET;
+ pci->edma_reg_phys = pci->atu_phys_addr + DEFAULT_DBI_DMA_OFFSET;
+ pci->edma_reg_size = pci->atu_size - DEFAULT_DBI_DMA_OFFSET;
}
}
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index ae6389dd9caa..52f26663e8b1 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -541,6 +541,8 @@ struct dw_pcie {
int max_link_speed;
u8 n_fts[2];
struct dw_edma_chip edma;
+ phys_addr_t edma_reg_phys;
+ resource_size_t edma_reg_size;
bool l1ss_support; /* L1 PM Substates support */
struct clk_bulk_data app_clks[DW_PCIE_NUM_APP_CLKS];
struct clk_bulk_data core_clks[DW_PCIE_NUM_CORE_CLKS];
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v7 5/9] PCI: dwc: ep: Expose integrated eDMA resources via EPC aux-resource API
2026-02-15 16:38 [PATCH v7 0/9] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback Koichiro Den
` (3 preceding siblings ...)
2026-02-15 16:38 ` [PATCH v7 4/9] PCI: dwc: Record integrated eDMA register window Koichiro Den
@ 2026-02-15 16:38 ` Koichiro Den
2026-02-16 14:12 ` Niklas Cassel
2026-02-16 16:02 ` Frank Li
2026-02-15 16:38 ` [PATCH v7 6/9] PCI: endpoint: pci-ep-msi: Refactor doorbell allocation for new backends Koichiro Den
` (3 subsequent siblings)
8 siblings, 2 replies; 21+ messages in thread
From: Koichiro Den @ 2026-02-15 16:38 UTC (permalink / raw)
To: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin, Frank.Li
Cc: linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
Implement the EPC aux-resource API for DesignWare endpoint controllers
with integrated eDMA.
Report:
- DMA controller MMIO window (PCI_EPC_AUX_DMA_CTRL_MMIO)
- interrupt-emulation doorbell register (PCI_EPC_AUX_DOORBELL_MMIO),
including its Linux IRQ
- per-channel LL descriptor regions (PCI_EPC_AUX_DMA_CHAN_DESC)
If the DMA controller MMIO window is already exposed via a
platform-owned fixed BAR subregion, also provide the BAR number and
offset so EPF drivers can reuse it without reprogramming the BAR.
Signed-off-by: Koichiro Den <den@valinux.co.jp>
---
.../pci/controller/dwc/pcie-designware-ep.c | 149 ++++++++++++++++++
1 file changed, 149 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index 7e7844ff0f7e..ffd2797b7b81 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -808,6 +808,154 @@ dw_pcie_ep_get_features(struct pci_epc *epc, u8 func_no, u8 vfunc_no)
return ep->ops->get_features(ep);
}
+static const struct pci_epc_bar_rsvd_region *
+dw_pcie_ep_find_bar_rsvd_region(struct dw_pcie_ep *ep,
+ enum pci_epc_bar_rsvd_region_type type,
+ enum pci_barno *bar,
+ resource_size_t *bar_offset)
+{
+ const struct pci_epc_features *features;
+ const struct pci_epc_bar_desc *bar_desc;
+ const struct pci_epc_bar_rsvd_region *r;
+ int i, j;
+
+ if (!ep->ops->get_features)
+ return NULL;
+
+ features = ep->ops->get_features(ep);
+ if (!features)
+ return NULL;
+
+ for (i = BAR_0; i <= BAR_5; i++) {
+ bar_desc = &features->bar[i];
+
+ if (!bar_desc->nr_rsvd_regions || !bar_desc->rsvd_regions)
+ continue;
+
+ for (j = 0; j < bar_desc->nr_rsvd_regions; j++) {
+ r = &bar_desc->rsvd_regions[j];
+
+ if (r->type != type)
+ continue;
+
+ if (bar)
+ *bar = i;
+ if (bar_offset)
+ *bar_offset = r->offset;
+ return r;
+ }
+ }
+
+ return NULL;
+}
+
+static int
+dw_pcie_ep_get_aux_resources(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
+ struct pci_epc_aux_resource *resources,
+ int num_resources)
+{
+ struct dw_pcie_ep *ep = epc_get_drvdata(epc);
+ struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
+ const struct pci_epc_bar_rsvd_region *rsvd;
+ struct dw_edma_chip *edma = &pci->edma;
+ enum pci_barno dma_ctrl_bar = NO_BAR;
+ int ll_cnt = 0, needed, idx = 0;
+ resource_size_t db_offset = edma->db_offset;
+ resource_size_t dma_ctrl_bar_offset = 0;
+ resource_size_t dma_reg_size;
+ unsigned int i;
+
+ if (!pci->edma_reg_size)
+ return 0;
+
+ dma_reg_size = pci->edma_reg_size;
+
+ for (i = 0; i < edma->ll_wr_cnt; i++)
+ if (edma->ll_region_wr[i].sz)
+ ll_cnt++;
+
+ for (i = 0; i < edma->ll_rd_cnt; i++)
+ if (edma->ll_region_rd[i].sz)
+ ll_cnt++;
+
+ needed = 1 + ll_cnt + (db_offset != ~0 ? 1 : 0);
+
+ /* Count query mode */
+ if (!resources || !num_resources)
+ return needed;
+
+ if (num_resources < needed)
+ return -ENOSPC;
+
+ rsvd = dw_pcie_ep_find_bar_rsvd_region(ep,
+ PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO,
+ &dma_ctrl_bar,
+ &dma_ctrl_bar_offset);
+ if (rsvd && rsvd->size < dma_reg_size)
+ dma_reg_size = rsvd->size;
+
+ /* DMA register block */
+ resources[idx++] = (struct pci_epc_aux_resource) {
+ .type = PCI_EPC_AUX_DMA_CTRL_MMIO,
+ .phys_addr = pci->edma_reg_phys,
+ .size = dma_reg_size,
+ .bar = dma_ctrl_bar,
+ .bar_offset = dma_ctrl_bar_offset,
+ };
+
+ /*
+ * For interrupt-emulation doorbells, report a standalone resource
+ * instead of bundling it into the DMA controller MMIO resource.
+ */
+ if (db_offset != ~0) {
+ if (dma_reg_size < sizeof(u32) ||
+ db_offset > dma_reg_size - sizeof(u32))
+ return -EINVAL;
+
+ resources[idx++] = (struct pci_epc_aux_resource) {
+ .type = PCI_EPC_AUX_DOORBELL_MMIO,
+ .phys_addr = pci->edma_reg_phys + db_offset,
+ .size = sizeof(u32),
+ .bar = dma_ctrl_bar,
+ .bar_offset = dma_ctrl_bar != NO_BAR ?
+ dma_ctrl_bar_offset + db_offset : 0,
+ .u.db_mmio = {
+ .irq = edma->db_irq,
+ },
+ };
+ }
+
+ /* One LL region per write channel */
+ for (i = 0; i < edma->ll_wr_cnt; i++) {
+ if (!edma->ll_region_wr[i].sz)
+ continue;
+
+ resources[idx++] = (struct pci_epc_aux_resource) {
+ .type = PCI_EPC_AUX_DMA_CHAN_DESC,
+ .phys_addr = edma->ll_region_wr[i].paddr,
+ .size = edma->ll_region_wr[i].sz,
+ .bar = NO_BAR,
+ .bar_offset = 0,
+ };
+ }
+
+ /* One LL region per read channel */
+ for (i = 0; i < edma->ll_rd_cnt; i++) {
+ if (!edma->ll_region_rd[i].sz)
+ continue;
+
+ resources[idx++] = (struct pci_epc_aux_resource) {
+ .type = PCI_EPC_AUX_DMA_CHAN_DESC,
+ .phys_addr = edma->ll_region_rd[i].paddr,
+ .size = edma->ll_region_rd[i].sz,
+ .bar = NO_BAR,
+ .bar_offset = 0,
+ };
+ }
+
+ return idx;
+}
+
static const struct pci_epc_ops epc_ops = {
.write_header = dw_pcie_ep_write_header,
.set_bar = dw_pcie_ep_set_bar,
@@ -823,6 +971,7 @@ static const struct pci_epc_ops epc_ops = {
.start = dw_pcie_ep_start,
.stop = dw_pcie_ep_stop,
.get_features = dw_pcie_ep_get_features,
+ .get_aux_resources = dw_pcie_ep_get_aux_resources,
};
/**
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v7 5/9] PCI: dwc: ep: Expose integrated eDMA resources via EPC aux-resource API
2026-02-15 16:38 ` [PATCH v7 5/9] PCI: dwc: ep: Expose integrated eDMA resources via EPC aux-resource API Koichiro Den
@ 2026-02-16 14:12 ` Niklas Cassel
2026-02-16 15:06 ` Koichiro Den
2026-02-16 16:02 ` Frank Li
1 sibling, 1 reply; 21+ messages in thread
From: Niklas Cassel @ 2026-02-16 14:12 UTC (permalink / raw)
To: Koichiro Den
Cc: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, shawn.lin, Frank.Li,
linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
On Mon, Feb 16, 2026 at 01:38:43AM +0900, Koichiro Den wrote:
> Implement the EPC aux-resource API for DesignWare endpoint controllers
> with integrated eDMA.
>
> Report:
> - DMA controller MMIO window (PCI_EPC_AUX_DMA_CTRL_MMIO)
> - interrupt-emulation doorbell register (PCI_EPC_AUX_DOORBELL_MMIO),
> including its Linux IRQ
> - per-channel LL descriptor regions (PCI_EPC_AUX_DMA_CHAN_DESC)
>
> If the DMA controller MMIO window is already exposed via a
> platform-owned fixed BAR subregion, also provide the BAR number and
> offset so EPF drivers can reuse it without reprogramming the BAR.
>
> Signed-off-by: Koichiro Den <den@valinux.co.jp>
> ---
> .../pci/controller/dwc/pcie-designware-ep.c | 149 ++++++++++++++++++
> 1 file changed, 149 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 7e7844ff0f7e..ffd2797b7b81 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -808,6 +808,154 @@ dw_pcie_ep_get_features(struct pci_epc *epc, u8 func_no, u8 vfunc_no)
> return ep->ops->get_features(ep);
> }
>
> +static const struct pci_epc_bar_rsvd_region *
> +dw_pcie_ep_find_bar_rsvd_region(struct dw_pcie_ep *ep,
> + enum pci_epc_bar_rsvd_region_type type,
> + enum pci_barno *bar,
> + resource_size_t *bar_offset)
> +{
> + const struct pci_epc_features *features;
> + const struct pci_epc_bar_desc *bar_desc;
> + const struct pci_epc_bar_rsvd_region *r;
> + int i, j;
> +
> + if (!ep->ops->get_features)
> + return NULL;
> +
> + features = ep->ops->get_features(ep);
> + if (!features)
> + return NULL;
> +
> + for (i = BAR_0; i <= BAR_5; i++) {
> + bar_desc = &features->bar[i];
> +
> + if (!bar_desc->nr_rsvd_regions || !bar_desc->rsvd_regions)
> + continue;
> +
> + for (j = 0; j < bar_desc->nr_rsvd_regions; j++) {
> + r = &bar_desc->rsvd_regions[j];
> +
> + if (r->type != type)
> + continue;
> +
> + if (bar)
> + *bar = i;
> + if (bar_offset)
> + *bar_offset = r->offset;
> + return r;
> + }
> + }
> +
> + return NULL;
> +}
> +
> +static int
> +dw_pcie_ep_get_aux_resources(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
> + struct pci_epc_aux_resource *resources,
> + int num_resources)
> +{
> + struct dw_pcie_ep *ep = epc_get_drvdata(epc);
> + struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
> + const struct pci_epc_bar_rsvd_region *rsvd;
> + struct dw_edma_chip *edma = &pci->edma;
> + enum pci_barno dma_ctrl_bar = NO_BAR;
> + int ll_cnt = 0, needed, idx = 0;
> + resource_size_t db_offset = edma->db_offset;
> + resource_size_t dma_ctrl_bar_offset = 0;
> + resource_size_t dma_reg_size;
> + unsigned int i;
> +
> + if (!pci->edma_reg_size)
> + return 0;
> +
> + dma_reg_size = pci->edma_reg_size;
> +
> + for (i = 0; i < edma->ll_wr_cnt; i++)
> + if (edma->ll_region_wr[i].sz)
> + ll_cnt++;
> +
> + for (i = 0; i < edma->ll_rd_cnt; i++)
> + if (edma->ll_region_rd[i].sz)
> + ll_cnt++;
> +
> + needed = 1 + ll_cnt + (db_offset != ~0 ? 1 : 0);
> +
> + /* Count query mode */
> + if (!resources || !num_resources)
> + return needed;
> +
> + if (num_resources < needed)
> + return -ENOSPC;
> +
> + rsvd = dw_pcie_ep_find_bar_rsvd_region(ep,
> + PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO,
> + &dma_ctrl_bar,
> + &dma_ctrl_bar_offset);
> + if (rsvd && rsvd->size < dma_reg_size)
> + dma_reg_size = rsvd->size;
> +
> + /* DMA register block */
> + resources[idx++] = (struct pci_epc_aux_resource) {
> + .type = PCI_EPC_AUX_DMA_CTRL_MMIO,
> + .phys_addr = pci->edma_reg_phys,
> + .size = dma_reg_size,
> + .bar = dma_ctrl_bar,
> + .bar_offset = dma_ctrl_bar_offset,
> + };
> +
> + /*
> + * For interrupt-emulation doorbells, report a standalone resource
> + * instead of bundling it into the DMA controller MMIO resource.
> + */
> + if (db_offset != ~0) {
> + if (dma_reg_size < sizeof(u32) ||
> + db_offset > dma_reg_size - sizeof(u32))
In your other patch, you used:
if (size_add(offset, sizeof(u32)) > epf->bar[bar].size)
For consistency, do you perhaps want to use the same here?
size_add(db_offset, sizeof(u32)) > dma_reg_size ?
Kind regards,
Niklas
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v7 5/9] PCI: dwc: ep: Expose integrated eDMA resources via EPC aux-resource API
2026-02-16 14:12 ` Niklas Cassel
@ 2026-02-16 15:06 ` Koichiro Den
0 siblings, 0 replies; 21+ messages in thread
From: Koichiro Den @ 2026-02-16 15:06 UTC (permalink / raw)
To: Niklas Cassel
Cc: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, shawn.lin, Frank.Li,
linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
On Mon, Feb 16, 2026 at 03:12:53PM +0100, Niklas Cassel wrote:
> On Mon, Feb 16, 2026 at 01:38:43AM +0900, Koichiro Den wrote:
> > Implement the EPC aux-resource API for DesignWare endpoint controllers
> > with integrated eDMA.
> >
> > Report:
> > - DMA controller MMIO window (PCI_EPC_AUX_DMA_CTRL_MMIO)
> > - interrupt-emulation doorbell register (PCI_EPC_AUX_DOORBELL_MMIO),
> > including its Linux IRQ
> > - per-channel LL descriptor regions (PCI_EPC_AUX_DMA_CHAN_DESC)
> >
> > If the DMA controller MMIO window is already exposed via a
> > platform-owned fixed BAR subregion, also provide the BAR number and
> > offset so EPF drivers can reuse it without reprogramming the BAR.
> >
> > Signed-off-by: Koichiro Den <den@valinux.co.jp>
> > ---
> > .../pci/controller/dwc/pcie-designware-ep.c | 149 ++++++++++++++++++
> > 1 file changed, 149 insertions(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> > index 7e7844ff0f7e..ffd2797b7b81 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> > @@ -808,6 +808,154 @@ dw_pcie_ep_get_features(struct pci_epc *epc, u8 func_no, u8 vfunc_no)
> > return ep->ops->get_features(ep);
> > }
> >
> > +static const struct pci_epc_bar_rsvd_region *
> > +dw_pcie_ep_find_bar_rsvd_region(struct dw_pcie_ep *ep,
> > + enum pci_epc_bar_rsvd_region_type type,
> > + enum pci_barno *bar,
> > + resource_size_t *bar_offset)
> > +{
> > + const struct pci_epc_features *features;
> > + const struct pci_epc_bar_desc *bar_desc;
> > + const struct pci_epc_bar_rsvd_region *r;
> > + int i, j;
> > +
> > + if (!ep->ops->get_features)
> > + return NULL;
> > +
> > + features = ep->ops->get_features(ep);
> > + if (!features)
> > + return NULL;
> > +
> > + for (i = BAR_0; i <= BAR_5; i++) {
> > + bar_desc = &features->bar[i];
> > +
> > + if (!bar_desc->nr_rsvd_regions || !bar_desc->rsvd_regions)
> > + continue;
> > +
> > + for (j = 0; j < bar_desc->nr_rsvd_regions; j++) {
> > + r = &bar_desc->rsvd_regions[j];
> > +
> > + if (r->type != type)
> > + continue;
> > +
> > + if (bar)
> > + *bar = i;
> > + if (bar_offset)
> > + *bar_offset = r->offset;
> > + return r;
> > + }
> > + }
> > +
> > + return NULL;
> > +}
> > +
> > +static int
> > +dw_pcie_ep_get_aux_resources(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
> > + struct pci_epc_aux_resource *resources,
> > + int num_resources)
> > +{
> > + struct dw_pcie_ep *ep = epc_get_drvdata(epc);
> > + struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
> > + const struct pci_epc_bar_rsvd_region *rsvd;
> > + struct dw_edma_chip *edma = &pci->edma;
> > + enum pci_barno dma_ctrl_bar = NO_BAR;
> > + int ll_cnt = 0, needed, idx = 0;
> > + resource_size_t db_offset = edma->db_offset;
> > + resource_size_t dma_ctrl_bar_offset = 0;
> > + resource_size_t dma_reg_size;
> > + unsigned int i;
> > +
> > + if (!pci->edma_reg_size)
> > + return 0;
> > +
> > + dma_reg_size = pci->edma_reg_size;
> > +
> > + for (i = 0; i < edma->ll_wr_cnt; i++)
> > + if (edma->ll_region_wr[i].sz)
> > + ll_cnt++;
> > +
> > + for (i = 0; i < edma->ll_rd_cnt; i++)
> > + if (edma->ll_region_rd[i].sz)
> > + ll_cnt++;
> > +
> > + needed = 1 + ll_cnt + (db_offset != ~0 ? 1 : 0);
> > +
> > + /* Count query mode */
> > + if (!resources || !num_resources)
> > + return needed;
> > +
> > + if (num_resources < needed)
> > + return -ENOSPC;
> > +
> > + rsvd = dw_pcie_ep_find_bar_rsvd_region(ep,
> > + PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO,
> > + &dma_ctrl_bar,
> > + &dma_ctrl_bar_offset);
> > + if (rsvd && rsvd->size < dma_reg_size)
> > + dma_reg_size = rsvd->size;
> > +
> > + /* DMA register block */
> > + resources[idx++] = (struct pci_epc_aux_resource) {
> > + .type = PCI_EPC_AUX_DMA_CTRL_MMIO,
> > + .phys_addr = pci->edma_reg_phys,
> > + .size = dma_reg_size,
> > + .bar = dma_ctrl_bar,
> > + .bar_offset = dma_ctrl_bar_offset,
> > + };
> > +
> > + /*
> > + * For interrupt-emulation doorbells, report a standalone resource
> > + * instead of bundling it into the DMA controller MMIO resource.
> > + */
> > + if (db_offset != ~0) {
> > + if (dma_reg_size < sizeof(u32) ||
> > + db_offset > dma_reg_size - sizeof(u32))
>
> In your other patch, you used:
>
> if (size_add(offset, sizeof(u32)) > epf->bar[bar].size)
>
> For consistency, do you perhaps want to use the same here?
>
> size_add(db_offset, sizeof(u32)) > dma_reg_size ?
db_offset and dma_reg_size are resource_size_t, not size_t. resource_size_t can
be wider than size_t on some 32-bit builds with CONFIG_PHYS_ADDR_T_64BIT, so
using size_add() would potentially introduce a narrowing conversion. For that
reason, I avoided it.
If that would be preferable, I'm happy to switch this part to something like:
if (db_offset != ~0) {
if (range_end_overflows_t(resource_size_t, db_offset,
sizeof(u32), dma_reg_size))
return -EINVAL;
or alternatively use check_add_overflow().
Best regards,
Koichiro
>
>
>
>
> Kind regards,
> Niklas
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v7 5/9] PCI: dwc: ep: Expose integrated eDMA resources via EPC aux-resource API
2026-02-15 16:38 ` [PATCH v7 5/9] PCI: dwc: ep: Expose integrated eDMA resources via EPC aux-resource API Koichiro Den
2026-02-16 14:12 ` Niklas Cassel
@ 2026-02-16 16:02 ` Frank Li
1 sibling, 0 replies; 21+ messages in thread
From: Frank Li @ 2026-02-16 16:02 UTC (permalink / raw)
To: Koichiro Den
Cc: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin,
linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
On Mon, Feb 16, 2026 at 01:38:43AM +0900, Koichiro Den wrote:
> Implement the EPC aux-resource API for DesignWare endpoint controllers
> with integrated eDMA.
>
> Report:
> - DMA controller MMIO window (PCI_EPC_AUX_DMA_CTRL_MMIO)
> - interrupt-emulation doorbell register (PCI_EPC_AUX_DOORBELL_MMIO),
> including its Linux IRQ
> - per-channel LL descriptor regions (PCI_EPC_AUX_DMA_CHAN_DESC)
>
> If the DMA controller MMIO window is already exposed via a
> platform-owned fixed BAR subregion, also provide the BAR number and
> offset so EPF drivers can reuse it without reprogramming the BAR.
>
> Signed-off-by: Koichiro Den <den@valinux.co.jp>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> .../pci/controller/dwc/pcie-designware-ep.c | 149 ++++++++++++++++++
> 1 file changed, 149 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 7e7844ff0f7e..ffd2797b7b81 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -808,6 +808,154 @@ dw_pcie_ep_get_features(struct pci_epc *epc, u8 func_no, u8 vfunc_no)
> return ep->ops->get_features(ep);
> }
>
> +static const struct pci_epc_bar_rsvd_region *
> +dw_pcie_ep_find_bar_rsvd_region(struct dw_pcie_ep *ep,
> + enum pci_epc_bar_rsvd_region_type type,
> + enum pci_barno *bar,
> + resource_size_t *bar_offset)
> +{
> + const struct pci_epc_features *features;
> + const struct pci_epc_bar_desc *bar_desc;
> + const struct pci_epc_bar_rsvd_region *r;
> + int i, j;
> +
> + if (!ep->ops->get_features)
> + return NULL;
> +
> + features = ep->ops->get_features(ep);
> + if (!features)
> + return NULL;
> +
> + for (i = BAR_0; i <= BAR_5; i++) {
> + bar_desc = &features->bar[i];
> +
> + if (!bar_desc->nr_rsvd_regions || !bar_desc->rsvd_regions)
> + continue;
> +
> + for (j = 0; j < bar_desc->nr_rsvd_regions; j++) {
> + r = &bar_desc->rsvd_regions[j];
> +
> + if (r->type != type)
> + continue;
> +
> + if (bar)
> + *bar = i;
> + if (bar_offset)
> + *bar_offset = r->offset;
> + return r;
> + }
> + }
> +
> + return NULL;
> +}
> +
> +static int
> +dw_pcie_ep_get_aux_resources(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
> + struct pci_epc_aux_resource *resources,
> + int num_resources)
> +{
> + struct dw_pcie_ep *ep = epc_get_drvdata(epc);
> + struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
> + const struct pci_epc_bar_rsvd_region *rsvd;
> + struct dw_edma_chip *edma = &pci->edma;
> + enum pci_barno dma_ctrl_bar = NO_BAR;
> + int ll_cnt = 0, needed, idx = 0;
> + resource_size_t db_offset = edma->db_offset;
> + resource_size_t dma_ctrl_bar_offset = 0;
> + resource_size_t dma_reg_size;
> + unsigned int i;
> +
> + if (!pci->edma_reg_size)
> + return 0;
> +
> + dma_reg_size = pci->edma_reg_size;
> +
> + for (i = 0; i < edma->ll_wr_cnt; i++)
> + if (edma->ll_region_wr[i].sz)
> + ll_cnt++;
> +
> + for (i = 0; i < edma->ll_rd_cnt; i++)
> + if (edma->ll_region_rd[i].sz)
> + ll_cnt++;
> +
> + needed = 1 + ll_cnt + (db_offset != ~0 ? 1 : 0);
> +
> + /* Count query mode */
> + if (!resources || !num_resources)
> + return needed;
> +
> + if (num_resources < needed)
> + return -ENOSPC;
> +
> + rsvd = dw_pcie_ep_find_bar_rsvd_region(ep,
> + PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO,
> + &dma_ctrl_bar,
> + &dma_ctrl_bar_offset);
> + if (rsvd && rsvd->size < dma_reg_size)
> + dma_reg_size = rsvd->size;
> +
> + /* DMA register block */
> + resources[idx++] = (struct pci_epc_aux_resource) {
> + .type = PCI_EPC_AUX_DMA_CTRL_MMIO,
> + .phys_addr = pci->edma_reg_phys,
> + .size = dma_reg_size,
> + .bar = dma_ctrl_bar,
> + .bar_offset = dma_ctrl_bar_offset,
> + };
> +
> + /*
> + * For interrupt-emulation doorbells, report a standalone resource
> + * instead of bundling it into the DMA controller MMIO resource.
> + */
> + if (db_offset != ~0) {
> + if (dma_reg_size < sizeof(u32) ||
> + db_offset > dma_reg_size - sizeof(u32))
> + return -EINVAL;
> +
> + resources[idx++] = (struct pci_epc_aux_resource) {
> + .type = PCI_EPC_AUX_DOORBELL_MMIO,
> + .phys_addr = pci->edma_reg_phys + db_offset,
> + .size = sizeof(u32),
> + .bar = dma_ctrl_bar,
> + .bar_offset = dma_ctrl_bar != NO_BAR ?
> + dma_ctrl_bar_offset + db_offset : 0,
> + .u.db_mmio = {
> + .irq = edma->db_irq,
> + },
> + };
> + }
> +
> + /* One LL region per write channel */
> + for (i = 0; i < edma->ll_wr_cnt; i++) {
> + if (!edma->ll_region_wr[i].sz)
> + continue;
> +
> + resources[idx++] = (struct pci_epc_aux_resource) {
> + .type = PCI_EPC_AUX_DMA_CHAN_DESC,
> + .phys_addr = edma->ll_region_wr[i].paddr,
> + .size = edma->ll_region_wr[i].sz,
> + .bar = NO_BAR,
> + .bar_offset = 0,
> + };
> + }
> +
> + /* One LL region per read channel */
> + for (i = 0; i < edma->ll_rd_cnt; i++) {
> + if (!edma->ll_region_rd[i].sz)
> + continue;
> +
> + resources[idx++] = (struct pci_epc_aux_resource) {
> + .type = PCI_EPC_AUX_DMA_CHAN_DESC,
> + .phys_addr = edma->ll_region_rd[i].paddr,
> + .size = edma->ll_region_rd[i].sz,
> + .bar = NO_BAR,
> + .bar_offset = 0,
> + };
> + }
> +
> + return idx;
> +}
> +
> static const struct pci_epc_ops epc_ops = {
> .write_header = dw_pcie_ep_write_header,
> .set_bar = dw_pcie_ep_set_bar,
> @@ -823,6 +971,7 @@ static const struct pci_epc_ops epc_ops = {
> .start = dw_pcie_ep_start,
> .stop = dw_pcie_ep_stop,
> .get_features = dw_pcie_ep_get_features,
> + .get_aux_resources = dw_pcie_ep_get_aux_resources,
> };
>
> /**
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v7 6/9] PCI: endpoint: pci-ep-msi: Refactor doorbell allocation for new backends
2026-02-15 16:38 [PATCH v7 0/9] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback Koichiro Den
` (4 preceding siblings ...)
2026-02-15 16:38 ` [PATCH v7 5/9] PCI: dwc: ep: Expose integrated eDMA resources via EPC aux-resource API Koichiro Den
@ 2026-02-15 16:38 ` Koichiro Den
2026-02-16 16:07 ` Frank Li
2026-02-15 16:38 ` [PATCH v7 7/9] PCI: endpoint: pci-epf-vntb: Reuse pre-exposed doorbells and IRQ flags Koichiro Den
` (2 subsequent siblings)
8 siblings, 1 reply; 21+ messages in thread
From: Koichiro Den @ 2026-02-15 16:38 UTC (permalink / raw)
To: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin, Frank.Li
Cc: linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
Prepare pci-ep-msi for non-MSI doorbell backends.
Factor MSI doorbell allocation into a helper and extend struct
pci_epf_doorbell_msg with:
- irq_flags: required IRQ request flags (e.g. IRQF_SHARED for some
backends)
- type: doorbell backend type
- bar/offset: pre-exposed doorbell target location, if any
Initialize these fields for the existing MSI-backed doorbell
implementation.
Also add PCI_EPF_DOORBELL_EMBEDDED type, which is to be implemented in a
follow-up patch.
No functional changes.
Signed-off-by: Koichiro Den <den@valinux.co.jp>
---
drivers/pci/endpoint/pci-ep-msi.c | 55 ++++++++++++++++++++++---------
include/linux/pci-epf.h | 23 +++++++++++--
2 files changed, 61 insertions(+), 17 deletions(-)
diff --git a/drivers/pci/endpoint/pci-ep-msi.c b/drivers/pci/endpoint/pci-ep-msi.c
index ad8a81d6ad77..a42f69ad24ad 100644
--- a/drivers/pci/endpoint/pci-ep-msi.c
+++ b/drivers/pci/endpoint/pci-ep-msi.c
@@ -8,6 +8,7 @@
#include <linux/device.h>
#include <linux/export.h>
+#include <linux/interrupt.h>
#include <linux/irqdomain.h>
#include <linux/module.h>
#include <linux/msi.h>
@@ -35,23 +36,13 @@ static void pci_epf_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
pci_epc_put(epc);
}
-int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 num_db)
+static int pci_epf_alloc_doorbell_msi(struct pci_epf *epf, u16 num_db)
{
- struct pci_epc *epc = epf->epc;
+ struct pci_epf_doorbell_msg *msg;
struct device *dev = &epf->dev;
+ struct pci_epc *epc = epf->epc;
struct irq_domain *domain;
- void *msg;
- int ret;
- int i;
-
- /* TODO: Multi-EPF support */
- if (list_first_entry_or_null(&epc->pci_epf, struct pci_epf, list) != epf) {
- dev_err(dev, "MSI doorbell doesn't support multiple EPF\n");
- return -EINVAL;
- }
-
- if (epf->db_msg)
- return -EBUSY;
+ int ret, i;
domain = of_msi_map_get_device_domain(epc->dev.parent, 0,
DOMAIN_BUS_PLATFORM_MSI);
@@ -74,6 +65,13 @@ int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 num_db)
if (!msg)
return -ENOMEM;
+ for (i = 0; i < num_db; i++) {
+ msg[i].irq_flags = 0;
+ msg[i].type = PCI_EPF_DOORBELL_MSI;
+ msg[i].bar = NO_BAR;
+ msg[i].offset = 0;
+ }
+
epf->num_db = num_db;
epf->db_msg = msg;
@@ -90,13 +88,40 @@ int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 num_db)
for (i = 0; i < num_db; i++)
epf->db_msg[i].virq = msi_get_virq(epc->dev.parent, i);
+ return 0;
+}
+
+int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 num_db)
+{
+ struct pci_epc *epc = epf->epc;
+ struct device *dev = &epf->dev;
+ int ret;
+
+ /* TODO: Multi-EPF support */
+ if (list_first_entry_or_null(&epc->pci_epf, struct pci_epf, list) != epf) {
+ dev_err(dev, "Doorbell doesn't support multiple EPF\n");
+ return -EINVAL;
+ }
+
+ if (epf->db_msg)
+ return -EBUSY;
+
+ ret = pci_epf_alloc_doorbell_msi(epf, num_db);
+ if (!ret)
+ return 0;
+
+ dev_err(dev, "Failed to allocate doorbell: %d\n", ret);
return ret;
}
EXPORT_SYMBOL_GPL(pci_epf_alloc_doorbell);
void pci_epf_free_doorbell(struct pci_epf *epf)
{
- platform_device_msi_free_irqs_all(epf->epc->dev.parent);
+ if (!epf->db_msg)
+ return;
+
+ if (epf->db_msg[0].type == PCI_EPF_DOORBELL_MSI)
+ platform_device_msi_free_irqs_all(epf->epc->dev.parent);
kfree(epf->db_msg);
epf->db_msg = NULL;
diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h
index 7737a7c03260..cd747447a1ea 100644
--- a/include/linux/pci-epf.h
+++ b/include/linux/pci-epf.h
@@ -152,14 +152,33 @@ struct pci_epf_bar {
struct pci_epf_bar_submap *submap;
};
+enum pci_epf_doorbell_type {
+ PCI_EPF_DOORBELL_MSI = 0,
+ PCI_EPF_DOORBELL_EMBEDDED,
+};
+
/**
* struct pci_epf_doorbell_msg - represents doorbell message
- * @msg: MSI message
- * @virq: IRQ number of this doorbell MSI message
+ * @msg: Doorbell address/data pair to be mapped into BAR space.
+ * For MSI-backed doorbells this is the MSI message, while for
+ * "embedded" doorbells this represents an MMIO write that asserts
+ * an interrupt on the EP side.
+ * @virq: IRQ number of this doorbell message
+ * @irq_flags: Required flags for request_irq()/request_threaded_irq().
+ * Callers may OR-in additional flags (e.g. IRQF_ONESHOT).
+ * @type: Doorbell type.
+ * @bar: BAR number where the doorbell target is already exposed to the RC
+ * (NO_BAR if not)
+ * @offset: offset within @bar for the doorbell target (valid iff
+ * @bar != NO_BAR)
*/
struct pci_epf_doorbell_msg {
struct msi_msg msg;
int virq;
+ unsigned long irq_flags;
+ enum pci_epf_doorbell_type type;
+ enum pci_barno bar;
+ resource_size_t offset;
};
/**
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v7 6/9] PCI: endpoint: pci-ep-msi: Refactor doorbell allocation for new backends
2026-02-15 16:38 ` [PATCH v7 6/9] PCI: endpoint: pci-ep-msi: Refactor doorbell allocation for new backends Koichiro Den
@ 2026-02-16 16:07 ` Frank Li
0 siblings, 0 replies; 21+ messages in thread
From: Frank Li @ 2026-02-16 16:07 UTC (permalink / raw)
To: Koichiro Den
Cc: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin,
linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
On Mon, Feb 16, 2026 at 01:38:44AM +0900, Koichiro Den wrote:
> Prepare pci-ep-msi for non-MSI doorbell backends.
>
> Factor MSI doorbell allocation into a helper and extend struct
> pci_epf_doorbell_msg with:
>
> - irq_flags: required IRQ request flags (e.g. IRQF_SHARED for some
> backends)
> - type: doorbell backend type
> - bar/offset: pre-exposed doorbell target location, if any
>
> Initialize these fields for the existing MSI-backed doorbell
> implementation.
>
> Also add PCI_EPF_DOORBELL_EMBEDDED type, which is to be implemented in a
> follow-up patch.
>
> No functional changes.
>
> Signed-off-by: Koichiro Den <den@valinux.co.jp>
> ---
> drivers/pci/endpoint/pci-ep-msi.c | 55 ++++++++++++++++++++++---------
> include/linux/pci-epf.h | 23 +++++++++++--
> 2 files changed, 61 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/pci/endpoint/pci-ep-msi.c b/drivers/pci/endpoint/pci-ep-msi.c
> index ad8a81d6ad77..a42f69ad24ad 100644
> --- a/drivers/pci/endpoint/pci-ep-msi.c
> +++ b/drivers/pci/endpoint/pci-ep-msi.c
> @@ -8,6 +8,7 @@
>
> #include <linux/device.h>
> #include <linux/export.h>
> +#include <linux/interrupt.h>
> #include <linux/irqdomain.h>
> #include <linux/module.h>
> #include <linux/msi.h>
> @@ -35,23 +36,13 @@ static void pci_epf_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
> pci_epc_put(epc);
> }
>
> -int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 num_db)
> +static int pci_epf_alloc_doorbell_msi(struct pci_epf *epf, u16 num_db)
> {
> - struct pci_epc *epc = epf->epc;
> + struct pci_epf_doorbell_msg *msg;
> struct device *dev = &epf->dev;
> + struct pci_epc *epc = epf->epc;
> struct irq_domain *domain;
> - void *msg;
> - int ret;
> - int i;
> -
> - /* TODO: Multi-EPF support */
> - if (list_first_entry_or_null(&epc->pci_epf, struct pci_epf, list) != epf) {
> - dev_err(dev, "MSI doorbell doesn't support multiple EPF\n");
> - return -EINVAL;
> - }
> -
> - if (epf->db_msg)
> - return -EBUSY;
> + int ret, i;
>
> domain = of_msi_map_get_device_domain(epc->dev.parent, 0,
> DOMAIN_BUS_PLATFORM_MSI);
> @@ -74,6 +65,13 @@ int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 num_db)
> if (!msg)
> return -ENOMEM;
>
> + for (i = 0; i < num_db; i++) {
> + msg[i].irq_flags = 0;
> + msg[i].type = PCI_EPF_DOORBELL_MSI;
> + msg[i].bar = NO_BAR;
> + msg[i].offset = 0;
> + }
user previous patch method to reduce write 0.
msg[i] = struct pci_epf_doorbell_msg { .type = PCI_EPF_DOORBELL_MSI; .bar = NO_BAR};
Frank
> +
> epf->num_db = num_db;
> epf->db_msg = msg;
>
> @@ -90,13 +88,40 @@ int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 num_db)
> for (i = 0; i < num_db; i++)
> epf->db_msg[i].virq = msi_get_virq(epc->dev.parent, i);
>
> + return 0;
> +}
> +
> +int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 num_db)
> +{
> + struct pci_epc *epc = epf->epc;
> + struct device *dev = &epf->dev;
> + int ret;
> +
> + /* TODO: Multi-EPF support */
> + if (list_first_entry_or_null(&epc->pci_epf, struct pci_epf, list) != epf) {
> + dev_err(dev, "Doorbell doesn't support multiple EPF\n");
> + return -EINVAL;
> + }
> +
> + if (epf->db_msg)
> + return -EBUSY;
> +
> + ret = pci_epf_alloc_doorbell_msi(epf, num_db);
> + if (!ret)
> + return 0;
> +
> + dev_err(dev, "Failed to allocate doorbell: %d\n", ret);
> return ret;
> }
> EXPORT_SYMBOL_GPL(pci_epf_alloc_doorbell);
>
> void pci_epf_free_doorbell(struct pci_epf *epf)
> {
> - platform_device_msi_free_irqs_all(epf->epc->dev.parent);
> + if (!epf->db_msg)
> + return;
> +
> + if (epf->db_msg[0].type == PCI_EPF_DOORBELL_MSI)
> + platform_device_msi_free_irqs_all(epf->epc->dev.parent);
>
> kfree(epf->db_msg);
> epf->db_msg = NULL;
> diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h
> index 7737a7c03260..cd747447a1ea 100644
> --- a/include/linux/pci-epf.h
> +++ b/include/linux/pci-epf.h
> @@ -152,14 +152,33 @@ struct pci_epf_bar {
> struct pci_epf_bar_submap *submap;
> };
>
> +enum pci_epf_doorbell_type {
> + PCI_EPF_DOORBELL_MSI = 0,
> + PCI_EPF_DOORBELL_EMBEDDED,
> +};
> +
> /**
> * struct pci_epf_doorbell_msg - represents doorbell message
> - * @msg: MSI message
> - * @virq: IRQ number of this doorbell MSI message
> + * @msg: Doorbell address/data pair to be mapped into BAR space.
> + * For MSI-backed doorbells this is the MSI message, while for
> + * "embedded" doorbells this represents an MMIO write that asserts
> + * an interrupt on the EP side.
> + * @virq: IRQ number of this doorbell message
> + * @irq_flags: Required flags for request_irq()/request_threaded_irq().
> + * Callers may OR-in additional flags (e.g. IRQF_ONESHOT).
> + * @type: Doorbell type.
> + * @bar: BAR number where the doorbell target is already exposed to the RC
> + * (NO_BAR if not)
> + * @offset: offset within @bar for the doorbell target (valid iff
> + * @bar != NO_BAR)
> */
> struct pci_epf_doorbell_msg {
> struct msi_msg msg;
> int virq;
> + unsigned long irq_flags;
> + enum pci_epf_doorbell_type type;
> + enum pci_barno bar;
> + resource_size_t offset;
> };
>
> /**
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v7 7/9] PCI: endpoint: pci-epf-vntb: Reuse pre-exposed doorbells and IRQ flags
2026-02-15 16:38 [PATCH v7 0/9] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback Koichiro Den
` (5 preceding siblings ...)
2026-02-15 16:38 ` [PATCH v7 6/9] PCI: endpoint: pci-ep-msi: Refactor doorbell allocation for new backends Koichiro Den
@ 2026-02-15 16:38 ` Koichiro Den
2026-02-16 16:14 ` Frank Li
2026-02-15 16:38 ` [PATCH v7 8/9] PCI: endpoint: pci-epf-test: Reuse pre-exposed doorbell targets Koichiro Den
2026-02-15 16:38 ` [PATCH v7 9/9] PCI: endpoint: pci-ep-msi: Add embedded eDMA doorbell fallback Koichiro Den
8 siblings, 1 reply; 21+ messages in thread
From: Koichiro Den @ 2026-02-15 16:38 UTC (permalink / raw)
To: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin, Frank.Li
Cc: linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
Support doorbell backends where the doorbell target is already exposed
via a platform-owned fixed BAR mapping and/or where the doorbell IRQ
must be requested with specific flags.
When pci_epf_alloc_doorbell() provides db_msg[].bar/offset, reuse the
pre-exposed BAR window and skip programming a new inbound mapping. Also
honor db_msg[].irq_flags when requesting the doorbell IRQ.
For embedded doorbells (e.g. interrupt-emulation), multiple doorbells
may share a single address/data pair and a single Linux IRQ. Avoid
requesting duplicate handlers by requesting only one IRQ in that case.
Signed-off-by: Koichiro Den <den@valinux.co.jp>
---
drivers/pci/endpoint/functions/pci-epf-vntb.c | 57 +++++++++++++++++--
1 file changed, 52 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/endpoint/functions/pci-epf-vntb.c
index 20efa27325f1..39ba4d6b7d8d 100644
--- a/drivers/pci/endpoint/functions/pci-epf-vntb.c
+++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c
@@ -134,6 +134,11 @@ struct epf_ntb {
u16 vntb_vid;
bool linkup;
+
+ /*
+ * True when doorbells are interrupt-driven (MSI or embedded), false
+ * when polled.
+ */
bool msi_doorbell;
u32 spad_size;
@@ -523,7 +528,7 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
enum pci_barno barno)
{
struct pci_epf *epf = ntb->epf;
- unsigned int req;
+ unsigned int req, cnt;
dma_addr_t low, high;
struct msi_msg *msg;
size_t sz;
@@ -534,9 +539,29 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
if (ret)
return ret;
- for (req = 0; req < ntb->db_count; req++) {
+ /*
+ * The doorbell target may already be exposed by a platform-owned fixed
+ * BAR. In that case, we must reuse it and the requested db_bar must
+ * match.
+ */
+ if (epf->db_msg[0].bar != NO_BAR && epf->db_msg[0].bar != barno) {
+ ret = -EINVAL;
+ goto err_free_doorbell;
+ }
+
+ /*
+ * For PCI_EPF_DOORBELL_EMBEDDED, the backend may provide a single MMIO
+ * address/data pair and a single Linux IRQ even if multiple doorbells
+ * were requested. Avoid requesting duplicate handlers in that case.
+ */
+ cnt = ntb->db_count;
+ if (epf->db_msg[0].type == PCI_EPF_DOORBELL_EMBEDDED)
+ cnt = 1;
+
+ for (req = 0; req < cnt; req++) {
ret = request_irq(epf->db_msg[req].virq, epf_ntb_doorbell_handler,
- 0, "pci_epf_vntb_db", ntb);
+ epf->db_msg[req].irq_flags, "pci_epf_vntb_db",
+ ntb);
if (ret) {
dev_err(&epf->dev,
@@ -546,6 +571,22 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
}
}
+ if (epf->db_msg[0].bar != NO_BAR) {
+ for (i = 0; i < ntb->db_count; i++) {
+ msg = &epf->db_msg[i].msg;
+
+ if (epf->db_msg[i].bar != barno) {
+ ret = -EINVAL;
+ goto err_free_irq;
+ }
+
+ ntb->reg->db_data[i] = msg->data;
+ ntb->reg->db_offset[i] = epf->db_msg[i].offset;
+ }
+ goto out;
+ }
+
+ /* Program inbound mapping for the doorbell */
msg = &epf->db_msg[0].msg;
high = 0;
@@ -592,6 +633,7 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
ntb->reg->db_offset[i] = offset;
}
+out:
ntb->reg->db_entry_size = 0;
ntb->msi_doorbell = true;
@@ -602,6 +644,7 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
while (req)
free_irq(epf->db_msg[--req].virq, ntb);
+err_free_doorbell:
pci_epf_free_doorbell(ntb->epf);
return ret;
}
@@ -665,9 +708,13 @@ static void epf_ntb_db_bar_clear(struct epf_ntb *ntb)
enum pci_barno barno;
if (ntb->msi_doorbell) {
- int i;
+ unsigned int cnt = ntb->db_count;
+ unsigned int i;
- for (i = 0; i < ntb->db_count; i++)
+ if (ntb->epf->db_msg[0].type == PCI_EPF_DOORBELL_EMBEDDED)
+ cnt = 1;
+
+ for (i = 0; i < cnt; i++)
free_irq(ntb->epf->db_msg[i].virq, ntb);
}
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v7 7/9] PCI: endpoint: pci-epf-vntb: Reuse pre-exposed doorbells and IRQ flags
2026-02-15 16:38 ` [PATCH v7 7/9] PCI: endpoint: pci-epf-vntb: Reuse pre-exposed doorbells and IRQ flags Koichiro Den
@ 2026-02-16 16:14 ` Frank Li
2026-02-17 1:39 ` Koichiro Den
0 siblings, 1 reply; 21+ messages in thread
From: Frank Li @ 2026-02-16 16:14 UTC (permalink / raw)
To: Koichiro Den
Cc: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin,
linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
On Mon, Feb 16, 2026 at 01:38:45AM +0900, Koichiro Den wrote:
> Support doorbell backends where the doorbell target is already exposed
> via a platform-owned fixed BAR mapping and/or where the doorbell IRQ
> must be requested with specific flags.
>
> When pci_epf_alloc_doorbell() provides db_msg[].bar/offset, reuse the
> pre-exposed BAR window and skip programming a new inbound mapping. Also
> honor db_msg[].irq_flags when requesting the doorbell IRQ.
>
> For embedded doorbells (e.g. interrupt-emulation), multiple doorbells
> may share a single address/data pair and a single Linux IRQ. Avoid
> requesting duplicate handlers by requesting only one IRQ in that case.
>
> Signed-off-by: Koichiro Den <den@valinux.co.jp>
> ---
> drivers/pci/endpoint/functions/pci-epf-vntb.c | 57 +++++++++++++++++--
> 1 file changed, 52 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/endpoint/functions/pci-epf-vntb.c
> index 20efa27325f1..39ba4d6b7d8d 100644
> --- a/drivers/pci/endpoint/functions/pci-epf-vntb.c
> +++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c
> @@ -134,6 +134,11 @@ struct epf_ntb {
> u16 vntb_vid;
>
> bool linkup;
> +
> + /*
> + * True when doorbells are interrupt-driven (MSI or embedded), false
> + * when polled.
> + */
> bool msi_doorbell;
> u32 spad_size;
>
> @@ -523,7 +528,7 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
> enum pci_barno barno)
> {
> struct pci_epf *epf = ntb->epf;
> - unsigned int req;
> + unsigned int req, cnt;
> dma_addr_t low, high;
> struct msi_msg *msg;
> size_t sz;
> @@ -534,9 +539,29 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
> if (ret)
> return ret;
>
> - for (req = 0; req < ntb->db_count; req++) {
> + /*
> + * The doorbell target may already be exposed by a platform-owned fixed
> + * BAR. In that case, we must reuse it and the requested db_bar must
> + * match.
> + */
> + if (epf->db_msg[0].bar != NO_BAR && epf->db_msg[0].bar != barno) {
> + ret = -EINVAL;
> + goto err_free_doorbell;
> + }
> +
> + /*
> + * For PCI_EPF_DOORBELL_EMBEDDED, the backend may provide a single MMIO
> + * address/data pair and a single Linux IRQ even if multiple doorbells
> + * were requested. Avoid requesting duplicate handlers in that case.
> + */
> + cnt = ntb->db_count;
> + if (epf->db_msg[0].type == PCI_EPF_DOORBELL_EMBEDDED)
> + cnt = 1;
Most SoC combine all DMA channel to one irqs. But it should be not
neccessary for SoC design. It is possible each DMA channel have dedicate
irq number. I suggest check irq, instead of type.
Frank
> +
> + for (req = 0; req < cnt; req++) {
> ret = request_irq(epf->db_msg[req].virq, epf_ntb_doorbell_handler,
> - 0, "pci_epf_vntb_db", ntb);
> + epf->db_msg[req].irq_flags, "pci_epf_vntb_db",
> + ntb);
>
> if (ret) {
> dev_err(&epf->dev,
> @@ -546,6 +571,22 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
> }
> }
>
> + if (epf->db_msg[0].bar != NO_BAR) {
> + for (i = 0; i < ntb->db_count; i++) {
> + msg = &epf->db_msg[i].msg;
> +
> + if (epf->db_msg[i].bar != barno) {
> + ret = -EINVAL;
> + goto err_free_irq;
> + }
> +
> + ntb->reg->db_data[i] = msg->data;
> + ntb->reg->db_offset[i] = epf->db_msg[i].offset;
> + }
> + goto out;
> + }
> +
> + /* Program inbound mapping for the doorbell */
> msg = &epf->db_msg[0].msg;
>
> high = 0;
> @@ -592,6 +633,7 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
> ntb->reg->db_offset[i] = offset;
> }
>
> +out:
> ntb->reg->db_entry_size = 0;
>
> ntb->msi_doorbell = true;
> @@ -602,6 +644,7 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
> while (req)
> free_irq(epf->db_msg[--req].virq, ntb);
>
> +err_free_doorbell:
> pci_epf_free_doorbell(ntb->epf);
> return ret;
> }
> @@ -665,9 +708,13 @@ static void epf_ntb_db_bar_clear(struct epf_ntb *ntb)
> enum pci_barno barno;
>
> if (ntb->msi_doorbell) {
> - int i;
> + unsigned int cnt = ntb->db_count;
> + unsigned int i;
>
> - for (i = 0; i < ntb->db_count; i++)
> + if (ntb->epf->db_msg[0].type == PCI_EPF_DOORBELL_EMBEDDED)
> + cnt = 1;
> +
> + for (i = 0; i < cnt; i++)
> free_irq(ntb->epf->db_msg[i].virq, ntb);
> }
>
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v7 7/9] PCI: endpoint: pci-epf-vntb: Reuse pre-exposed doorbells and IRQ flags
2026-02-16 16:14 ` Frank Li
@ 2026-02-17 1:39 ` Koichiro Den
0 siblings, 0 replies; 21+ messages in thread
From: Koichiro Den @ 2026-02-17 1:39 UTC (permalink / raw)
To: Frank Li
Cc: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin,
linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
On Mon, Feb 16, 2026 at 11:14:58AM -0500, Frank Li wrote:
> On Mon, Feb 16, 2026 at 01:38:45AM +0900, Koichiro Den wrote:
> > Support doorbell backends where the doorbell target is already exposed
> > via a platform-owned fixed BAR mapping and/or where the doorbell IRQ
> > must be requested with specific flags.
> >
> > When pci_epf_alloc_doorbell() provides db_msg[].bar/offset, reuse the
> > pre-exposed BAR window and skip programming a new inbound mapping. Also
> > honor db_msg[].irq_flags when requesting the doorbell IRQ.
> >
> > For embedded doorbells (e.g. interrupt-emulation), multiple doorbells
> > may share a single address/data pair and a single Linux IRQ. Avoid
> > requesting duplicate handlers by requesting only one IRQ in that case.
> >
> > Signed-off-by: Koichiro Den <den@valinux.co.jp>
> > ---
> > drivers/pci/endpoint/functions/pci-epf-vntb.c | 57 +++++++++++++++++--
> > 1 file changed, 52 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/endpoint/functions/pci-epf-vntb.c
> > index 20efa27325f1..39ba4d6b7d8d 100644
> > --- a/drivers/pci/endpoint/functions/pci-epf-vntb.c
> > +++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c
> > @@ -134,6 +134,11 @@ struct epf_ntb {
> > u16 vntb_vid;
> >
> > bool linkup;
> > +
> > + /*
> > + * True when doorbells are interrupt-driven (MSI or embedded), false
> > + * when polled.
> > + */
> > bool msi_doorbell;
> > u32 spad_size;
> >
> > @@ -523,7 +528,7 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
> > enum pci_barno barno)
> > {
> > struct pci_epf *epf = ntb->epf;
> > - unsigned int req;
> > + unsigned int req, cnt;
> > dma_addr_t low, high;
> > struct msi_msg *msg;
> > size_t sz;
> > @@ -534,9 +539,29 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
> > if (ret)
> > return ret;
> >
> > - for (req = 0; req < ntb->db_count; req++) {
> > + /*
> > + * The doorbell target may already be exposed by a platform-owned fixed
> > + * BAR. In that case, we must reuse it and the requested db_bar must
> > + * match.
> > + */
> > + if (epf->db_msg[0].bar != NO_BAR && epf->db_msg[0].bar != barno) {
> > + ret = -EINVAL;
> > + goto err_free_doorbell;
> > + }
> > +
> > + /*
> > + * For PCI_EPF_DOORBELL_EMBEDDED, the backend may provide a single MMIO
> > + * address/data pair and a single Linux IRQ even if multiple doorbells
> > + * were requested. Avoid requesting duplicate handlers in that case.
> > + */
> > + cnt = ntb->db_count;
> > + if (epf->db_msg[0].type == PCI_EPF_DOORBELL_EMBEDDED)
> > + cnt = 1;
>
> Most SoC combine all DMA channel to one irqs. But it should be not
> neccessary for SoC design. It is possible each DMA channel have dedicate
> irq number. I suggest check irq, instead of type.
Sounds reasonable. I was trying to keep the code minimal, but your suggestion
makes it more future-proof and avoids exposing PCI_EPF_DOORBELL_EMBEDDED details
to this consumer layer. I'll adjust this part accordingly.
THanks for the review,
Koichiro
>
> Frank
> > +
> > + for (req = 0; req < cnt; req++) {
> > ret = request_irq(epf->db_msg[req].virq, epf_ntb_doorbell_handler,
> > - 0, "pci_epf_vntb_db", ntb);
> > + epf->db_msg[req].irq_flags, "pci_epf_vntb_db",
> > + ntb);
> >
> > if (ret) {
> > dev_err(&epf->dev,
> > @@ -546,6 +571,22 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
> > }
> > }
> >
> > + if (epf->db_msg[0].bar != NO_BAR) {
> > + for (i = 0; i < ntb->db_count; i++) {
> > + msg = &epf->db_msg[i].msg;
> > +
> > + if (epf->db_msg[i].bar != barno) {
> > + ret = -EINVAL;
> > + goto err_free_irq;
> > + }
> > +
> > + ntb->reg->db_data[i] = msg->data;
> > + ntb->reg->db_offset[i] = epf->db_msg[i].offset;
> > + }
> > + goto out;
> > + }
> > +
> > + /* Program inbound mapping for the doorbell */
> > msg = &epf->db_msg[0].msg;
> >
> > high = 0;
> > @@ -592,6 +633,7 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
> > ntb->reg->db_offset[i] = offset;
> > }
> >
> > +out:
> > ntb->reg->db_entry_size = 0;
> >
> > ntb->msi_doorbell = true;
> > @@ -602,6 +644,7 @@ static int epf_ntb_db_bar_init_msi_doorbell(struct epf_ntb *ntb,
> > while (req)
> > free_irq(epf->db_msg[--req].virq, ntb);
> >
> > +err_free_doorbell:
> > pci_epf_free_doorbell(ntb->epf);
> > return ret;
> > }
> > @@ -665,9 +708,13 @@ static void epf_ntb_db_bar_clear(struct epf_ntb *ntb)
> > enum pci_barno barno;
> >
> > if (ntb->msi_doorbell) {
> > - int i;
> > + unsigned int cnt = ntb->db_count;
> > + unsigned int i;
> >
> > - for (i = 0; i < ntb->db_count; i++)
> > + if (ntb->epf->db_msg[0].type == PCI_EPF_DOORBELL_EMBEDDED)
> > + cnt = 1;
> > +
> > + for (i = 0; i < cnt; i++)
> > free_irq(ntb->epf->db_msg[i].virq, ntb);
> > }
> >
> > --
> > 2.51.0
> >
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v7 8/9] PCI: endpoint: pci-epf-test: Reuse pre-exposed doorbell targets
2026-02-15 16:38 [PATCH v7 0/9] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback Koichiro Den
` (6 preceding siblings ...)
2026-02-15 16:38 ` [PATCH v7 7/9] PCI: endpoint: pci-epf-vntb: Reuse pre-exposed doorbells and IRQ flags Koichiro Den
@ 2026-02-15 16:38 ` Koichiro Den
2026-02-16 16:18 ` Frank Li
2026-02-15 16:38 ` [PATCH v7 9/9] PCI: endpoint: pci-ep-msi: Add embedded eDMA doorbell fallback Koichiro Den
8 siblings, 1 reply; 21+ messages in thread
From: Koichiro Den @ 2026-02-15 16:38 UTC (permalink / raw)
To: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin, Frank.Li
Cc: linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
pci-epf-test advertises the doorbell target to the RC as a BAR number
and an offset, and the RC rings the doorbell with a single DWORD MMIO
write.
Some doorbell backends may report that the doorbell target is already
exposed via a platform-owned fixed BAR (db_msg[0].bar/offset). In that
case, reuse the pre-exposed window and do not reprogram the BAR with
pci_epc_set_bar().
Also honor db_msg[0].irq_flags when requesting the doorbell IRQ, and
only restore the original BAR mapping on disable if pci-epf-test
programmed it.
Signed-off-by: Koichiro Den <den@valinux.co.jp>
---
drivers/pci/endpoint/functions/pci-epf-test.c | 84 +++++++++++++------
1 file changed, 57 insertions(+), 27 deletions(-)
diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c
index defe1e2ea427..7b0955b4c703 100644
--- a/drivers/pci/endpoint/functions/pci-epf-test.c
+++ b/drivers/pci/endpoint/functions/pci-epf-test.c
@@ -87,6 +87,7 @@ struct pci_epf_test {
const struct pci_epc_features *epc_features;
struct pci_epf_bar db_bar;
bool db_irq_requested;
+ bool db_bar_programmed;
size_t bar_size[PCI_STD_NUM_BARS];
};
@@ -730,7 +731,9 @@ static void pci_epf_test_enable_doorbell(struct pci_epf_test *epf_test,
{
u32 status = le32_to_cpu(reg->status);
struct pci_epf *epf = epf_test->epf;
+ struct pci_epf_doorbell_msg *db;
struct pci_epc *epc = epf->epc;
+ unsigned long irq_flags;
struct msi_msg *msg;
enum pci_barno bar;
size_t offset;
@@ -742,13 +745,28 @@ static void pci_epf_test_enable_doorbell(struct pci_epf_test *epf_test,
if (ret)
goto set_status_err;
- msg = &epf->db_msg[0].msg;
- bar = pci_epc_get_next_free_bar(epf_test->epc_features, epf_test->test_reg_bar + 1);
- if (bar < BAR_0)
- goto err_doorbell_cleanup;
+ db = &epf->db_msg[0];
+ msg = &db->msg;
+ epf_test->db_bar_programmed = false;
+
+ if (db->bar != NO_BAR) {
+ /*
+ * The doorbell target is already exposed via a platform-owned
+ * fixed BAR
+ */
+ bar = db->bar;
+ offset = db->offset;
+ } else {
+ bar = pci_epc_get_next_free_bar(epf_test->epc_features,
+ epf_test->test_reg_bar + 1);
+ if (bar < BAR_0)
+ goto err_doorbell_cleanup;
+ }
+
+ irq_flags = epf->db_msg[0].irq_flags | IRQF_ONESHOT;
ret = request_threaded_irq(epf->db_msg[0].virq, NULL,
- pci_epf_test_doorbell_handler, IRQF_ONESHOT,
+ pci_epf_test_doorbell_handler, irq_flags,
"pci-ep-test-doorbell", epf_test);
if (ret) {
dev_err(&epf->dev,
@@ -761,25 +779,33 @@ static void pci_epf_test_enable_doorbell(struct pci_epf_test *epf_test,
reg->doorbell_data = cpu_to_le32(msg->data);
reg->doorbell_bar = cpu_to_le32(bar);
- msg = &epf->db_msg[0].msg;
- ret = pci_epf_align_inbound_addr(epf, bar, ((u64)msg->address_hi << 32) | msg->address_lo,
- &epf_test->db_bar.phys_addr, &offset);
+ if (db->bar == NO_BAR) {
+ ret = pci_epf_align_inbound_addr(epf, bar,
+ ((u64)msg->address_hi << 32) |
+ msg->address_lo,
+ &epf_test->db_bar.phys_addr,
+ &offset);
- if (ret)
- goto err_doorbell_cleanup;
+ if (ret)
+ goto err_doorbell_cleanup;
+ }
if (size_add(offset, sizeof(u32)) > epf->bar[bar].size)
goto err_doorbell_cleanup;
reg->doorbell_offset = cpu_to_le32(offset);
- epf_test->db_bar.barno = bar;
- epf_test->db_bar.size = epf->bar[bar].size;
- epf_test->db_bar.flags = epf->bar[bar].flags;
+ if (db->bar == NO_BAR) {
+ epf_test->db_bar.barno = bar;
+ epf_test->db_bar.size = epf->bar[bar].size;
+ epf_test->db_bar.flags = epf->bar[bar].flags;
- ret = pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, &epf_test->db_bar);
- if (ret)
- goto err_doorbell_cleanup;
+ ret = pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, &epf_test->db_bar);
+ if (ret)
+ goto err_doorbell_cleanup;
+
+ epf_test->db_bar_programmed = true;
+ }
status |= STATUS_DOORBELL_ENABLE_SUCCESS;
reg->status = cpu_to_le32(status);
@@ -806,17 +832,21 @@ static void pci_epf_test_disable_doorbell(struct pci_epf_test *epf_test,
pci_epf_test_doorbell_cleanup(epf_test);
- /*
- * The doorbell feature temporarily overrides the inbound translation
- * to point to the address stored in epf_test->db_bar.phys_addr, i.e.,
- * it calls set_bar() twice without ever calling clear_bar(), as
- * calling clear_bar() would clear the BAR's PCI address assigned by
- * the host. Thus, when disabling the doorbell, restore the inbound
- * translation to point to the memory allocated for the BAR.
- */
- ret = pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, &epf->bar[bar]);
- if (ret)
- goto set_status_err;
+ if (epf_test->db_bar_programmed) {
+ /*
+ * The doorbell feature temporarily overrides the inbound translation
+ * to point to the address stored in epf_test->db_bar.phys_addr, i.e.,
+ * it calls set_bar() twice without ever calling clear_bar(), as
+ * calling clear_bar() would clear the BAR's PCI address assigned by
+ * the host. Thus, when disabling the doorbell, restore the inbound
+ * translation to point to the memory allocated for the BAR.
+ */
+ ret = pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, &epf->bar[bar]);
+ if (ret)
+ goto set_status_err;
+
+ epf_test->db_bar_programmed = false;
+ }
status |= STATUS_DOORBELL_DISABLE_SUCCESS;
reg->status = cpu_to_le32(status);
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v7 8/9] PCI: endpoint: pci-epf-test: Reuse pre-exposed doorbell targets
2026-02-15 16:38 ` [PATCH v7 8/9] PCI: endpoint: pci-epf-test: Reuse pre-exposed doorbell targets Koichiro Den
@ 2026-02-16 16:18 ` Frank Li
0 siblings, 0 replies; 21+ messages in thread
From: Frank Li @ 2026-02-16 16:18 UTC (permalink / raw)
To: Koichiro Den
Cc: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin,
linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
On Mon, Feb 16, 2026 at 01:38:46AM +0900, Koichiro Den wrote:
> pci-epf-test advertises the doorbell target to the RC as a BAR number
> and an offset, and the RC rings the doorbell with a single DWORD MMIO
> write.
>
> Some doorbell backends may report that the doorbell target is already
> exposed via a platform-owned fixed BAR (db_msg[0].bar/offset). In that
> case, reuse the pre-exposed window and do not reprogram the BAR with
> pci_epc_set_bar().
>
> Also honor db_msg[0].irq_flags when requesting the doorbell IRQ, and
> only restore the original BAR mapping on disable if pci-epf-test
> programmed it.
>
> Signed-off-by: Koichiro Den <den@valinux.co.jp>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> drivers/pci/endpoint/functions/pci-epf-test.c | 84 +++++++++++++------
> 1 file changed, 57 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c
> index defe1e2ea427..7b0955b4c703 100644
> --- a/drivers/pci/endpoint/functions/pci-epf-test.c
> +++ b/drivers/pci/endpoint/functions/pci-epf-test.c
> @@ -87,6 +87,7 @@ struct pci_epf_test {
> const struct pci_epc_features *epc_features;
> struct pci_epf_bar db_bar;
> bool db_irq_requested;
> + bool db_bar_programmed;
> size_t bar_size[PCI_STD_NUM_BARS];
> };
>
> @@ -730,7 +731,9 @@ static void pci_epf_test_enable_doorbell(struct pci_epf_test *epf_test,
> {
> u32 status = le32_to_cpu(reg->status);
> struct pci_epf *epf = epf_test->epf;
> + struct pci_epf_doorbell_msg *db;
> struct pci_epc *epc = epf->epc;
> + unsigned long irq_flags;
> struct msi_msg *msg;
> enum pci_barno bar;
> size_t offset;
> @@ -742,13 +745,28 @@ static void pci_epf_test_enable_doorbell(struct pci_epf_test *epf_test,
> if (ret)
> goto set_status_err;
>
> - msg = &epf->db_msg[0].msg;
> - bar = pci_epc_get_next_free_bar(epf_test->epc_features, epf_test->test_reg_bar + 1);
> - if (bar < BAR_0)
> - goto err_doorbell_cleanup;
> + db = &epf->db_msg[0];
> + msg = &db->msg;
> + epf_test->db_bar_programmed = false;
> +
> + if (db->bar != NO_BAR) {
> + /*
> + * The doorbell target is already exposed via a platform-owned
> + * fixed BAR
> + */
> + bar = db->bar;
> + offset = db->offset;
> + } else {
> + bar = pci_epc_get_next_free_bar(epf_test->epc_features,
> + epf_test->test_reg_bar + 1);
> + if (bar < BAR_0)
> + goto err_doorbell_cleanup;
> + }
> +
> + irq_flags = epf->db_msg[0].irq_flags | IRQF_ONESHOT;
>
> ret = request_threaded_irq(epf->db_msg[0].virq, NULL,
> - pci_epf_test_doorbell_handler, IRQF_ONESHOT,
> + pci_epf_test_doorbell_handler, irq_flags,
> "pci-ep-test-doorbell", epf_test);
> if (ret) {
> dev_err(&epf->dev,
> @@ -761,25 +779,33 @@ static void pci_epf_test_enable_doorbell(struct pci_epf_test *epf_test,
> reg->doorbell_data = cpu_to_le32(msg->data);
> reg->doorbell_bar = cpu_to_le32(bar);
>
> - msg = &epf->db_msg[0].msg;
> - ret = pci_epf_align_inbound_addr(epf, bar, ((u64)msg->address_hi << 32) | msg->address_lo,
> - &epf_test->db_bar.phys_addr, &offset);
> + if (db->bar == NO_BAR) {
> + ret = pci_epf_align_inbound_addr(epf, bar,
> + ((u64)msg->address_hi << 32) |
> + msg->address_lo,
> + &epf_test->db_bar.phys_addr,
> + &offset);
>
> - if (ret)
> - goto err_doorbell_cleanup;
> + if (ret)
> + goto err_doorbell_cleanup;
> + }
>
> if (size_add(offset, sizeof(u32)) > epf->bar[bar].size)
> goto err_doorbell_cleanup;
>
> reg->doorbell_offset = cpu_to_le32(offset);
>
> - epf_test->db_bar.barno = bar;
> - epf_test->db_bar.size = epf->bar[bar].size;
> - epf_test->db_bar.flags = epf->bar[bar].flags;
> + if (db->bar == NO_BAR) {
> + epf_test->db_bar.barno = bar;
> + epf_test->db_bar.size = epf->bar[bar].size;
> + epf_test->db_bar.flags = epf->bar[bar].flags;
>
> - ret = pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, &epf_test->db_bar);
> - if (ret)
> - goto err_doorbell_cleanup;
> + ret = pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, &epf_test->db_bar);
> + if (ret)
> + goto err_doorbell_cleanup;
> +
> + epf_test->db_bar_programmed = true;
> + }
>
> status |= STATUS_DOORBELL_ENABLE_SUCCESS;
> reg->status = cpu_to_le32(status);
> @@ -806,17 +832,21 @@ static void pci_epf_test_disable_doorbell(struct pci_epf_test *epf_test,
>
> pci_epf_test_doorbell_cleanup(epf_test);
>
> - /*
> - * The doorbell feature temporarily overrides the inbound translation
> - * to point to the address stored in epf_test->db_bar.phys_addr, i.e.,
> - * it calls set_bar() twice without ever calling clear_bar(), as
> - * calling clear_bar() would clear the BAR's PCI address assigned by
> - * the host. Thus, when disabling the doorbell, restore the inbound
> - * translation to point to the memory allocated for the BAR.
> - */
> - ret = pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, &epf->bar[bar]);
> - if (ret)
> - goto set_status_err;
> + if (epf_test->db_bar_programmed) {
> + /*
> + * The doorbell feature temporarily overrides the inbound translation
> + * to point to the address stored in epf_test->db_bar.phys_addr, i.e.,
> + * it calls set_bar() twice without ever calling clear_bar(), as
> + * calling clear_bar() would clear the BAR's PCI address assigned by
> + * the host. Thus, when disabling the doorbell, restore the inbound
> + * translation to point to the memory allocated for the BAR.
> + */
> + ret = pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, &epf->bar[bar]);
> + if (ret)
> + goto set_status_err;
> +
> + epf_test->db_bar_programmed = false;
> + }
>
> status |= STATUS_DOORBELL_DISABLE_SUCCESS;
> reg->status = cpu_to_le32(status);
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v7 9/9] PCI: endpoint: pci-ep-msi: Add embedded eDMA doorbell fallback
2026-02-15 16:38 [PATCH v7 0/9] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback Koichiro Den
` (7 preceding siblings ...)
2026-02-15 16:38 ` [PATCH v7 8/9] PCI: endpoint: pci-epf-test: Reuse pre-exposed doorbell targets Koichiro Den
@ 2026-02-15 16:38 ` Koichiro Den
2026-02-16 16:24 ` Frank Li
2026-02-17 4:00 ` Koichiro Den
8 siblings, 2 replies; 21+ messages in thread
From: Koichiro Den @ 2026-02-15 16:38 UTC (permalink / raw)
To: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin, Frank.Li
Cc: linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
Some endpoint platforms cannot use platform MSI / GIC ITS to implement
EP-side doorbells. In those cases, EPF drivers cannot provide an
interrupt-driven doorbell and often fall back to polling.
Add an "embedded" doorbell backend that uses a controller-integrated
doorbell target (e.g. DesignWare integrated eDMA interrupt-emulation
doorbell).
The backend locates the doorbell register and a corresponding Linux IRQ
via the EPC aux-resource API. If the doorbell register is already
exposed via a fixed BAR mapping, provide BAR+offset. Otherwise provide
the physical address so EPF drivers can map it into BAR space.
When MSI doorbell allocation fails with -ENODEV,
pci_epf_alloc_doorbell() falls back to this embedded backend.
Signed-off-by: Koichiro Den <den@valinux.co.jp>
---
drivers/pci/endpoint/pci-ep-msi.c | 90 +++++++++++++++++++++++++++++++
1 file changed, 90 insertions(+)
diff --git a/drivers/pci/endpoint/pci-ep-msi.c b/drivers/pci/endpoint/pci-ep-msi.c
index a42f69ad24ad..6e1524c2d891 100644
--- a/drivers/pci/endpoint/pci-ep-msi.c
+++ b/drivers/pci/endpoint/pci-ep-msi.c
@@ -6,6 +6,7 @@
* Author: Frank Li <Frank.Li@nxp.com>
*/
+#include <linux/cleanup.h>
#include <linux/device.h>
#include <linux/export.h>
#include <linux/interrupt.h>
@@ -36,6 +37,82 @@ static void pci_epf_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
pci_epc_put(epc);
}
+static int pci_epf_alloc_doorbell_embedded(struct pci_epf *epf, u16 num_db)
+{
+ const struct pci_epc_aux_resource *doorbell = NULL;
+ struct pci_epf_doorbell_msg *msg;
+ struct pci_epc *epc = epf->epc;
+ struct device *dev = &epf->dev;
+ int count, ret, i;
+ u64 addr;
+
+ count = pci_epc_get_aux_resources(epc, epf->func_no, epf->vfunc_no,
+ NULL, 0);
+ if (count == -EOPNOTSUPP || count == 0)
+ return -ENODEV;
+ if (count < 0)
+ return count;
+
+ struct pci_epc_aux_resource *res __free(kfree) =
+ kcalloc(count, sizeof(*res), GFP_KERNEL);
+ if (!res)
+ return -ENOMEM;
+
+ ret = pci_epc_get_aux_resources(epc, epf->func_no, epf->vfunc_no,
+ res, count);
+ if (ret == -EOPNOTSUPP || ret == 0)
+ return -ENODEV;
+ if (ret < 0)
+ return ret;
+
+ count = ret;
+
+ for (i = 0; i < count; i++) {
+ if (res[i].type == PCI_EPC_AUX_DOORBELL_MMIO) {
+ if (doorbell) {
+ dev_warn(dev,
+ "Duplicate DOORBELL_MMIO resource found\n");
+ continue;
+ }
+ doorbell = &res[i];
+ }
+ }
+ if (!doorbell)
+ return -ENODEV;
+
+ msg = kcalloc(num_db, sizeof(*msg), GFP_KERNEL);
+ if (!msg)
+ return -ENOMEM;
+
+ addr = doorbell->phys_addr;
+
+ /*
+ * Embedded doorbell backends (e.g. DesignWare eDMA interrupt emulation)
+ * typically provide a single IRQ and do not offer per-doorbell
+ * distinguishable address/data pairs. The EPC aux resource therefore
+ * exposes one DOORBELL_MMIO entry (u.db_mmio.irq).
+ *
+ * Still, pci_epf_alloc_doorbell() allows requesting multiple doorbells.
+ * For such backends we replicate the same address/data for each entry
+ * and mark the IRQ as shared (IRQF_SHARED). Consumers must treat them
+ * as equivalent "kick" doorbells.
+ */
+ for (i = 0; i < num_db; i++) {
+ msg[i].msg.address_lo = (u32)addr;
+ msg[i].msg.address_hi = (u32)(addr >> 32);
+ msg[i].msg.data = 0;
+ msg[i].virq = doorbell->u.db_mmio.irq;
+ msg[i].irq_flags = IRQF_SHARED;
+ msg[i].type = PCI_EPF_DOORBELL_EMBEDDED;
+ msg[i].bar = doorbell->bar;
+ msg[i].offset = (doorbell->bar == NO_BAR) ? 0 : doorbell->bar_offset;
+ }
+
+ epf->num_db = num_db;
+ epf->db_msg = msg;
+ return 0;
+}
+
static int pci_epf_alloc_doorbell_msi(struct pci_epf *epf, u16 num_db)
{
struct pci_epf_doorbell_msg *msg;
@@ -110,6 +187,19 @@ int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 num_db)
if (!ret)
return 0;
+ /*
+ * Fall back to embedded doorbell only when platform MSI is unavailable
+ * for this EPC.
+ */
+ if (ret != -ENODEV)
+ return ret;
+
+ ret = pci_epf_alloc_doorbell_embedded(epf, num_db);
+ if (!ret) {
+ dev_info(dev, "Using embedded (DMA) doorbell fallback\n");
+ return 0;
+ }
+
dev_err(dev, "Failed to allocate doorbell: %d\n", ret);
return ret;
}
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v7 9/9] PCI: endpoint: pci-ep-msi: Add embedded eDMA doorbell fallback
2026-02-15 16:38 ` [PATCH v7 9/9] PCI: endpoint: pci-ep-msi: Add embedded eDMA doorbell fallback Koichiro Den
@ 2026-02-16 16:24 ` Frank Li
2026-02-17 1:42 ` Koichiro Den
2026-02-17 4:00 ` Koichiro Den
1 sibling, 1 reply; 21+ messages in thread
From: Frank Li @ 2026-02-16 16:24 UTC (permalink / raw)
To: Koichiro Den
Cc: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin,
linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
On Mon, Feb 16, 2026 at 01:38:47AM +0900, Koichiro Den wrote:
> Some endpoint platforms cannot use platform MSI / GIC ITS to implement
> EP-side doorbells. In those cases, EPF drivers cannot provide an
> interrupt-driven doorbell and often fall back to polling.
>
> Add an "embedded" doorbell backend that uses a controller-integrated
> doorbell target (e.g. DesignWare integrated eDMA interrupt-emulation
> doorbell).
>
> The backend locates the doorbell register and a corresponding Linux IRQ
> via the EPC aux-resource API. If the doorbell register is already
> exposed via a fixed BAR mapping, provide BAR+offset. Otherwise provide
> the physical address so EPF drivers can map it into BAR space.
>
> When MSI doorbell allocation fails with -ENODEV,
> pci_epf_alloc_doorbell() falls back to this embedded backend.
>
> Signed-off-by: Koichiro Den <den@valinux.co.jp>
> ---
> drivers/pci/endpoint/pci-ep-msi.c | 90 +++++++++++++++++++++++++++++++
> 1 file changed, 90 insertions(+)
>
> diff --git a/drivers/pci/endpoint/pci-ep-msi.c b/drivers/pci/endpoint/pci-ep-msi.c
> index a42f69ad24ad..6e1524c2d891 100644
> --- a/drivers/pci/endpoint/pci-ep-msi.c
> +++ b/drivers/pci/endpoint/pci-ep-msi.c
> @@ -6,6 +6,7 @@
> * Author: Frank Li <Frank.Li@nxp.com>
> */
>
> +#include <linux/cleanup.h>
> #include <linux/device.h>
> #include <linux/export.h>
> #include <linux/interrupt.h>
> @@ -36,6 +37,82 @@ static void pci_epf_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
> pci_epc_put(epc);
> }
>
> +static int pci_epf_alloc_doorbell_embedded(struct pci_epf *epf, u16 num_db)
> +{
> + const struct pci_epc_aux_resource *doorbell = NULL;
> + struct pci_epf_doorbell_msg *msg;
> + struct pci_epc *epc = epf->epc;
> + struct device *dev = &epf->dev;
> + int count, ret, i;
> + u64 addr;
> +
> + count = pci_epc_get_aux_resources(epc, epf->func_no, epf->vfunc_no,
> + NULL, 0);
> + if (count == -EOPNOTSUPP || count == 0)
> + return -ENODEV;
> + if (count < 0)
> + return count;
> +
> + struct pci_epc_aux_resource *res __free(kfree) =
> + kcalloc(count, sizeof(*res), GFP_KERNEL);
> + if (!res)
> + return -ENOMEM;
> +
> + ret = pci_epc_get_aux_resources(epc, epf->func_no, epf->vfunc_no,
> + res, count);
> + if (ret == -EOPNOTSUPP || ret == 0)
> + return -ENODEV;
> + if (ret < 0)
> + return ret;
> +
> + count = ret;
> +
> + for (i = 0; i < count; i++) {
> + if (res[i].type == PCI_EPC_AUX_DOORBELL_MMIO) {
> + if (doorbell) {
> + dev_warn(dev,
> + "Duplicate DOORBELL_MMIO resource found\n");
> + continue;
> + }
> + doorbell = &res[i];
> + }
> + }
> + if (!doorbell)
> + return -ENODEV;
> +
> + msg = kcalloc(num_db, sizeof(*msg), GFP_KERNEL);
> + if (!msg)
> + return -ENOMEM;
> +
> + addr = doorbell->phys_addr;
> +
> + /*
> + * Embedded doorbell backends (e.g. DesignWare eDMA interrupt emulation)
> + * typically provide a single IRQ and do not offer per-doorbell
> + * distinguishable address/data pairs. The EPC aux resource therefore
> + * exposes one DOORBELL_MMIO entry (u.db_mmio.irq).
> + *
> + * Still, pci_epf_alloc_doorbell() allows requesting multiple doorbells.
> + * For such backends we replicate the same address/data for each entry
> + * and mark the IRQ as shared (IRQF_SHARED). Consumers must treat them
> + * as equivalent "kick" doorbells.
> + */
> + for (i = 0; i < num_db; i++) {
> + msg[i].msg.address_lo = (u32)addr;
> + msg[i].msg.address_hi = (u32)(addr >> 32);
> + msg[i].msg.data = 0;
> + msg[i].virq = doorbell->u.db_mmio.irq;
> + msg[i].irq_flags = IRQF_SHARED;
> + msg[i].type = PCI_EPF_DOORBELL_EMBEDDED;
> + msg[i].bar = doorbell->bar;
> + msg[i].offset = (doorbell->bar == NO_BAR) ? 0 : doorbell->bar_offset;
> + }
> +
> + epf->num_db = num_db;
> + epf->db_msg = msg;
> + return 0;
> +}
> +
> static int pci_epf_alloc_doorbell_msi(struct pci_epf *epf, u16 num_db)
> {
> struct pci_epf_doorbell_msg *msg;
> @@ -110,6 +187,19 @@ int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 num_db)
> if (!ret)
> return 0;
>
> + /*
> + * Fall back to embedded doorbell only when platform MSI is unavailable
> + * for this EPC.
> + */
> + if (ret != -ENODEV)
> + return ret;
> +
> + ret = pci_epf_alloc_doorbell_embedded(epf, num_db);
> + if (!ret) {
> + dev_info(dev, "Using embedded (DMA) doorbell fallback\n");
> + return 0;
> + }
here, needn't reverise logic, mostly we put err path in if branch.
if (ret) {
dev_err(dev, "Failed to allocate doorbell: %d\n", ret);
return ret;
}
dev_info(dev, "Using embedded (DMA) doorbell fallback\n");
return 0;
Frank
> +
> dev_err(dev, "Failed to allocate doorbell: %d\n", ret);
> return ret;
> }
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v7 9/9] PCI: endpoint: pci-ep-msi: Add embedded eDMA doorbell fallback
2026-02-16 16:24 ` Frank Li
@ 2026-02-17 1:42 ` Koichiro Den
0 siblings, 0 replies; 21+ messages in thread
From: Koichiro Den @ 2026-02-17 1:42 UTC (permalink / raw)
To: Frank Li
Cc: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin,
linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
On Mon, Feb 16, 2026 at 11:24:38AM -0500, Frank Li wrote:
> On Mon, Feb 16, 2026 at 01:38:47AM +0900, Koichiro Den wrote:
> > Some endpoint platforms cannot use platform MSI / GIC ITS to implement
> > EP-side doorbells. In those cases, EPF drivers cannot provide an
> > interrupt-driven doorbell and often fall back to polling.
> >
> > Add an "embedded" doorbell backend that uses a controller-integrated
> > doorbell target (e.g. DesignWare integrated eDMA interrupt-emulation
> > doorbell).
> >
> > The backend locates the doorbell register and a corresponding Linux IRQ
> > via the EPC aux-resource API. If the doorbell register is already
> > exposed via a fixed BAR mapping, provide BAR+offset. Otherwise provide
> > the physical address so EPF drivers can map it into BAR space.
> >
> > When MSI doorbell allocation fails with -ENODEV,
> > pci_epf_alloc_doorbell() falls back to this embedded backend.
> >
> > Signed-off-by: Koichiro Den <den@valinux.co.jp>
> > ---
> > drivers/pci/endpoint/pci-ep-msi.c | 90 +++++++++++++++++++++++++++++++
> > 1 file changed, 90 insertions(+)
> >
> > diff --git a/drivers/pci/endpoint/pci-ep-msi.c b/drivers/pci/endpoint/pci-ep-msi.c
> > index a42f69ad24ad..6e1524c2d891 100644
> > --- a/drivers/pci/endpoint/pci-ep-msi.c
> > +++ b/drivers/pci/endpoint/pci-ep-msi.c
> > @@ -6,6 +6,7 @@
> > * Author: Frank Li <Frank.Li@nxp.com>
> > */
> >
> > +#include <linux/cleanup.h>
> > #include <linux/device.h>
> > #include <linux/export.h>
> > #include <linux/interrupt.h>
> > @@ -36,6 +37,82 @@ static void pci_epf_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
> > pci_epc_put(epc);
> > }
> >
> > +static int pci_epf_alloc_doorbell_embedded(struct pci_epf *epf, u16 num_db)
> > +{
> > + const struct pci_epc_aux_resource *doorbell = NULL;
> > + struct pci_epf_doorbell_msg *msg;
> > + struct pci_epc *epc = epf->epc;
> > + struct device *dev = &epf->dev;
> > + int count, ret, i;
> > + u64 addr;
> > +
> > + count = pci_epc_get_aux_resources(epc, epf->func_no, epf->vfunc_no,
> > + NULL, 0);
> > + if (count == -EOPNOTSUPP || count == 0)
> > + return -ENODEV;
> > + if (count < 0)
> > + return count;
> > +
> > + struct pci_epc_aux_resource *res __free(kfree) =
> > + kcalloc(count, sizeof(*res), GFP_KERNEL);
> > + if (!res)
> > + return -ENOMEM;
> > +
> > + ret = pci_epc_get_aux_resources(epc, epf->func_no, epf->vfunc_no,
> > + res, count);
> > + if (ret == -EOPNOTSUPP || ret == 0)
> > + return -ENODEV;
> > + if (ret < 0)
> > + return ret;
> > +
> > + count = ret;
> > +
> > + for (i = 0; i < count; i++) {
> > + if (res[i].type == PCI_EPC_AUX_DOORBELL_MMIO) {
> > + if (doorbell) {
> > + dev_warn(dev,
> > + "Duplicate DOORBELL_MMIO resource found\n");
> > + continue;
> > + }
> > + doorbell = &res[i];
> > + }
> > + }
> > + if (!doorbell)
> > + return -ENODEV;
> > +
> > + msg = kcalloc(num_db, sizeof(*msg), GFP_KERNEL);
> > + if (!msg)
> > + return -ENOMEM;
> > +
> > + addr = doorbell->phys_addr;
> > +
> > + /*
> > + * Embedded doorbell backends (e.g. DesignWare eDMA interrupt emulation)
> > + * typically provide a single IRQ and do not offer per-doorbell
> > + * distinguishable address/data pairs. The EPC aux resource therefore
> > + * exposes one DOORBELL_MMIO entry (u.db_mmio.irq).
> > + *
> > + * Still, pci_epf_alloc_doorbell() allows requesting multiple doorbells.
> > + * For such backends we replicate the same address/data for each entry
> > + * and mark the IRQ as shared (IRQF_SHARED). Consumers must treat them
> > + * as equivalent "kick" doorbells.
> > + */
> > + for (i = 0; i < num_db; i++) {
> > + msg[i].msg.address_lo = (u32)addr;
> > + msg[i].msg.address_hi = (u32)(addr >> 32);
> > + msg[i].msg.data = 0;
> > + msg[i].virq = doorbell->u.db_mmio.irq;
> > + msg[i].irq_flags = IRQF_SHARED;
> > + msg[i].type = PCI_EPF_DOORBELL_EMBEDDED;
> > + msg[i].bar = doorbell->bar;
> > + msg[i].offset = (doorbell->bar == NO_BAR) ? 0 : doorbell->bar_offset;
> > + }
> > +
> > + epf->num_db = num_db;
> > + epf->db_msg = msg;
> > + return 0;
> > +}
> > +
> > static int pci_epf_alloc_doorbell_msi(struct pci_epf *epf, u16 num_db)
> > {
> > struct pci_epf_doorbell_msg *msg;
> > @@ -110,6 +187,19 @@ int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 num_db)
> > if (!ret)
> > return 0;
> >
> > + /*
> > + * Fall back to embedded doorbell only when platform MSI is unavailable
> > + * for this EPC.
> > + */
> > + if (ret != -ENODEV)
> > + return ret;
> > +
> > + ret = pci_epf_alloc_doorbell_embedded(epf, num_db);
> > + if (!ret) {
> > + dev_info(dev, "Using embedded (DMA) doorbell fallback\n");
> > + return 0;
> > + }
>
> here, needn't reverise logic, mostly we put err path in if branch.
>
> if (ret) {
> dev_err(dev, "Failed to allocate doorbell: %d\n", ret);
> return ret;
> }
>
> dev_info(dev, "Using embedded (DMA) doorbell fallback\n");
> return 0;
Thanks for pointing this out. I'll update it.
Koichiro
>
> Frank
> > +
> > dev_err(dev, "Failed to allocate doorbell: %d\n", ret);
> > return ret;
> > }
> > --
> > 2.51.0
> >
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v7 9/9] PCI: endpoint: pci-ep-msi: Add embedded eDMA doorbell fallback
2026-02-15 16:38 ` [PATCH v7 9/9] PCI: endpoint: pci-ep-msi: Add embedded eDMA doorbell fallback Koichiro Den
2026-02-16 16:24 ` Frank Li
@ 2026-02-17 4:00 ` Koichiro Den
1 sibling, 0 replies; 21+ messages in thread
From: Koichiro Den @ 2026-02-17 4:00 UTC (permalink / raw)
To: Frank.Li
Cc: jingoohan1, mani, lpieralisi, kwilczynski, robh, bhelgaas, heiko,
kishon, jdmason, dave.jiang, allenbh, cassel, shawn.lin,
linux-pci, linux-kernel, linux-arm-kernel, linux-rockchip, ntb
On Mon, Feb 16, 2026 at 01:38:47AM +0900, Koichiro Den wrote:
> Some endpoint platforms cannot use platform MSI / GIC ITS to implement
> EP-side doorbells. In those cases, EPF drivers cannot provide an
> interrupt-driven doorbell and often fall back to polling.
>
> Add an "embedded" doorbell backend that uses a controller-integrated
> doorbell target (e.g. DesignWare integrated eDMA interrupt-emulation
> doorbell).
>
> The backend locates the doorbell register and a corresponding Linux IRQ
> via the EPC aux-resource API. If the doorbell register is already
> exposed via a fixed BAR mapping, provide BAR+offset. Otherwise provide
> the physical address so EPF drivers can map it into BAR space.
>
> When MSI doorbell allocation fails with -ENODEV,
> pci_epf_alloc_doorbell() falls back to this embedded backend.
>
> Signed-off-by: Koichiro Den <den@valinux.co.jp>
> ---
> drivers/pci/endpoint/pci-ep-msi.c | 90 +++++++++++++++++++++++++++++++
> 1 file changed, 90 insertions(+)
>
> diff --git a/drivers/pci/endpoint/pci-ep-msi.c b/drivers/pci/endpoint/pci-ep-msi.c
> index a42f69ad24ad..6e1524c2d891 100644
> --- a/drivers/pci/endpoint/pci-ep-msi.c
> +++ b/drivers/pci/endpoint/pci-ep-msi.c
> @@ -6,6 +6,7 @@
> * Author: Frank Li <Frank.Li@nxp.com>
> */
>
> +#include <linux/cleanup.h>
> #include <linux/device.h>
> #include <linux/export.h>
> #include <linux/interrupt.h>
> @@ -36,6 +37,82 @@ static void pci_epf_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
> pci_epc_put(epc);
> }
>
> +static int pci_epf_alloc_doorbell_embedded(struct pci_epf *epf, u16 num_db)
> +{
> + const struct pci_epc_aux_resource *doorbell = NULL;
> + struct pci_epf_doorbell_msg *msg;
> + struct pci_epc *epc = epf->epc;
> + struct device *dev = &epf->dev;
> + int count, ret, i;
> + u64 addr;
> +
> + count = pci_epc_get_aux_resources(epc, epf->func_no, epf->vfunc_no,
> + NULL, 0);
> + if (count == -EOPNOTSUPP || count == 0)
> + return -ENODEV;
> + if (count < 0)
> + return count;
> +
> + struct pci_epc_aux_resource *res __free(kfree) =
> + kcalloc(count, sizeof(*res), GFP_KERNEL);
> + if (!res)
> + return -ENOMEM;
> +
> + ret = pci_epc_get_aux_resources(epc, epf->func_no, epf->vfunc_no,
> + res, count);
> + if (ret == -EOPNOTSUPP || ret == 0)
> + return -ENODEV;
> + if (ret < 0)
> + return ret;
> +
> + count = ret;
> +
> + for (i = 0; i < count; i++) {
> + if (res[i].type == PCI_EPC_AUX_DOORBELL_MMIO) {
> + if (doorbell) {
> + dev_warn(dev,
> + "Duplicate DOORBELL_MMIO resource found\n");
> + continue;
> + }
> + doorbell = &res[i];
> + }
> + }
> + if (!doorbell)
> + return -ENODEV;
> +
> + msg = kcalloc(num_db, sizeof(*msg), GFP_KERNEL);
> + if (!msg)
> + return -ENOMEM;
> +
> + addr = doorbell->phys_addr;
> +
> + /*
> + * Embedded doorbell backends (e.g. DesignWare eDMA interrupt emulation)
> + * typically provide a single IRQ and do not offer per-doorbell
> + * distinguishable address/data pairs. The EPC aux resource therefore
> + * exposes one DOORBELL_MMIO entry (u.db_mmio.irq).
> + *
> + * Still, pci_epf_alloc_doorbell() allows requesting multiple doorbells.
> + * For such backends we replicate the same address/data for each entry
> + * and mark the IRQ as shared (IRQF_SHARED). Consumers must treat them
> + * as equivalent "kick" doorbells.
> + */
> + for (i = 0; i < num_db; i++) {
> + msg[i].msg.address_lo = (u32)addr;
> + msg[i].msg.address_hi = (u32)(addr >> 32);
> + msg[i].msg.data = 0;
Hi Frank,
Thanks for your feedback on [PATCH v7 6/9]:
https://lore.kernel.org/linux-pci/aZNA3lQCne2laAW6@lizhi-Precision-Tower-5810/
I realized that pci_epf_alloc_doorbell_embedded() assumes a "write-0-to-assert"
semantics, which appears to be specific to DesignWare eDMA interrupt emulation.
I'm wondering whether it would be better to extend pci_epc_aux_resource
(introduced in [PATCH v7 3/9]) from the beginning, instead of deferring the
change until another vendor wants to support a PCI_EPC_AUX_DOORBELL_MMIO
resource description with different semantics (i.e. not "write-0-to-assert"):
Personally, I'm inclined to extend it at this point, like this:
struct pci_epc_aux_resource {
enum pci_epc_aux_resource_type type;
phys_addr_t phys_addr;
resource_size_t size;
enum pci_barno bar;
resource_size_t bar_offset;
union {
/* PCI_EPC_AUX_DOORBELL_MMIO */
struct {
int irq;
+ u32 data; /* write data to kick */
} db_mmio;
} u;
};
In that case, I suppose I would need to drop your Reviewed-by tag for that commit.
Best regards,
Koichiro
> + msg[i].virq = doorbell->u.db_mmio.irq;
> + msg[i].irq_flags = IRQF_SHARED;
> + msg[i].type = PCI_EPF_DOORBELL_EMBEDDED;
> + msg[i].bar = doorbell->bar;
> + msg[i].offset = (doorbell->bar == NO_BAR) ? 0 : doorbell->bar_offset;
> + }
> +
> + epf->num_db = num_db;
> + epf->db_msg = msg;
> + return 0;
> +}
> +
> static int pci_epf_alloc_doorbell_msi(struct pci_epf *epf, u16 num_db)
> {
> struct pci_epf_doorbell_msg *msg;
> @@ -110,6 +187,19 @@ int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 num_db)
> if (!ret)
> return 0;
>
> + /*
> + * Fall back to embedded doorbell only when platform MSI is unavailable
> + * for this EPC.
> + */
> + if (ret != -ENODEV)
> + return ret;
> +
> + ret = pci_epf_alloc_doorbell_embedded(epf, num_db);
> + if (!ret) {
> + dev_info(dev, "Using embedded (DMA) doorbell fallback\n");
> + return 0;
> + }
> +
> dev_err(dev, "Failed to allocate doorbell: %d\n", ret);
> return ret;
> }
> --
> 2.51.0
>
>
^ permalink raw reply [flat|nested] 21+ messages in thread