From: Catalin Marinas <catalin.marinas@arm.com>
To: "David Hildenbrand (Arm)" <david@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
Mark Brown <broonie@kernel.org>, Will Deacon <will@kernel.org>,
Emanuele Rocca <emanuele.rocca@arm.com>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH 1/3] arm64: gcs: Do not set PTE_SHARED on GCS mappings if FEAT_LPA2 is enabled
Date: Fri, 20 Feb 2026 16:47:49 +0000 [thread overview]
Message-ID: <aZiQNaJVFz2DWY0Y@arm.com> (raw)
In-Reply-To: <aZiPl4fQUuU00uJl@arm.com>
On Fri, Feb 20, 2026 at 04:45:11PM +0000, Catalin Marinas wrote:
> On Fri, Feb 20, 2026 at 04:56:26PM +0100, David Hildenbrand wrote:
> > On 2/20/26 15:05, Catalin Marinas wrote:
> > > diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h
> > > index 161e8660eddd..a65f2c50e9ca 100644
> > > --- a/arch/arm64/include/asm/pgtable-prot.h
> > > +++ b/arch/arm64/include/asm/pgtable-prot.h
> > > @@ -164,8 +164,8 @@ static inline bool __pure lpa2_is_enabled(void)
> > > #define _PAGE_GCS (_PAGE_DEFAULT | PTE_NG | PTE_UXN | PTE_WRITE | PTE_USER)
> > > #define _PAGE_GCS_RO (_PAGE_DEFAULT | PTE_NG | PTE_UXN | PTE_USER)
> > > -#define PAGE_GCS __pgprot(_PAGE_GCS)
> > > -#define PAGE_GCS_RO __pgprot(_PAGE_GCS_RO)
> > > +#define PAGE_GCS __pgprot((_PAGE_GCS & ~PTE_SHARED) | PTE_MAYBE_SHARED)
> > > +#define PAGE_GCS_RO __pgprot((_PAGE_GCS_RO & ~PTE_SHARED) | PTE_MAYBE_SHARED)
> > > #define PIE_E0 ( \
> > > PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_GCS), PIE_GCS) | \
> > > diff --git a/arch/arm64/mm/mmap.c b/arch/arm64/mm/mmap.c
> > > index 08ee177432c2..2e404441063b 100644
> > > --- a/arch/arm64/mm/mmap.c
> > > +++ b/arch/arm64/mm/mmap.c
> > > @@ -87,7 +87,7 @@ pgprot_t vm_get_page_prot(vm_flags_t vm_flags)
> > > /* Short circuit GCS to avoid bloating the table. */
> > > if (system_supports_gcs() && (vm_flags & VM_SHADOW_STACK)) {
> > > - prot = _PAGE_GCS_RO;
> > > + prot = pgprot_val(PAGE_GCS_RO);
> > > } else {
> > > prot = pgprot_val(protection_map[vm_flags &
> > > (VM_READ|VM_WRITE|VM_EXEC|VM_SHARED)]);
> >
> > The only confusion I have is why we don't update _PAGE_GCS/_PAGE_GCS_RO,
> > consequently leaving PTE_SHARED set for the other users of
> > _PAGE_GCS/_PAGE_GCS_RO in arch/arm64/include/asm/pgtable-prot.h.
> >
> > Staring at pte_pi_index() (and the definitions of PTE_PI_IDX_0), I assume it
> > doesn't matter.
> >
> > Just curious why we don't fixup _PAGE_GCS / _PAGE_GCS_RO instead.
>
> _PAGE_GCS needs to be constant as it ends up in asm, so we can't add
> the dynamic PTE_MAYBE_SHARED. There are other ways to solve this but it
> is somewhat more consistent with the other _PAGE_* definitions which all
> have PTE_SHARED.
Hmm, it's only in asm-offsets and it looks like the compiler didn't
complain. I'll check the generated code.
--
Catalin
next prev parent reply other threads:[~2026-02-20 16:48 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-20 14:05 [PATCH 0/3] arm64: Assorted GCS fixes Catalin Marinas
2026-02-20 14:05 ` [PATCH 1/3] arm64: gcs: Do not set PTE_SHARED on GCS mappings if FEAT_LPA2 is enabled Catalin Marinas
2026-02-20 15:56 ` David Hildenbrand (Arm)
2026-02-20 16:45 ` Catalin Marinas
2026-02-20 16:47 ` Catalin Marinas [this message]
2026-02-20 14:05 ` [PATCH 2/3] arm64: gcs: Allow PAGE_NONE mappings for NUMA balancing Catalin Marinas
2026-02-20 16:16 ` David Hildenbrand (Arm)
2026-02-20 19:52 ` Catalin Marinas
2026-02-20 14:05 ` [PATCH 3/3] arm64: gcs: Do not map the guarded control stack as THP Catalin Marinas
2026-02-20 14:34 ` Mark Brown
2026-02-20 15:13 ` Catalin Marinas
2026-02-20 16:17 ` Mark Brown
2026-02-20 15:33 ` David Hildenbrand (Arm)
2026-02-20 15:36 ` Mark Brown
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