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[83.233.6.197]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5a0eeb45813sm1367725e87.64.2026.02.22.23.29.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Feb 2026 23:29:10 -0800 (PST) Date: Mon, 23 Feb 2026 08:29:07 +0100 From: Marcus Folkesson To: Peter Rosin Cc: Wolfram Sang , Michael Hennerich , Bartosz Golaszewski , Andi Shyti , Andy Shevchenko , Bartosz Golaszewski , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v6 2/5] i2c: mux: add support for per channel bus frequency Message-ID: References: <20260216-i2c-mux-v6-0-9be28ecfd7e3@gmail.com> <20260216-i2c-mux-v6-2-9be28ecfd7e3@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="MoMPLdIF9j3bHqVN" Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260222_232915_544542_A733889D X-CRM114-Status: GOOD ( 33.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --MoMPLdIF9j3bHqVN Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Peter, On Wed, Feb 18, 2026 at 08:02:54AM +0100, Marcus Folkesson wrote: > Hi Peter! >=20 > On Tue, Feb 17, 2026 at 10:37:39AM +0100, Peter Rosin wrote: > > Hi! > >=20 > > 2026-02-16 at 19:50, Marcus Folkesson wrote: > > > Hi Peter! > > >=20 > > > On Mon, Feb 16, 2026 at 05:40:37PM +0100, Peter Rosin wrote: > > >> Hi! > > >> > > >>> +static struct i2c_mux_core *i2c_mux_first_mux_locked(struct i2c_ad= apter *adap) > > >>> +{ > > >>> + struct i2c_adapter *parent; > > >>> + > > >>> + while ((parent =3D i2c_parent_is_i2c_adapter(adap)) !=3D NULL) { > > >>> + struct i2c_mux_priv *priv =3D adap->algo_data; > > >> > > >> This assumption does not hold, making the cast pretty wild indeed. T= here > > >> are other i2c_adapters with a parent besides muxes. See e.g. i2c_atr= =2Ec > > >=20 > > > I see. Hrm, not sure how to decide if it is a mux or not. The best I > > > could come up with is to look at the i2c_adapter.lock_ops. E.g. > > >=20 > > >=20 > > > while ((parent =3D i2c_parent_is_i2c_adapter(adap)) !=3D NULL) { > > > /* > > > * Check if this adapter is a mux channel by verifying its > > > * lock_ops. Only mux channels use these specific lock operations. > > > */ > > > if (adap->lock_ops =3D=3D &i2c_mux_lock_ops || > > > adap->lock_ops =3D=3D &i2c_parent_lock_ops) { > > > struct i2c_mux_priv *priv =3D adap->algo_data; > > >=20 > > > if (priv->muxc->mux_locked) > > > return priv->muxc; > > > } > > > adap =3D parent; > > > } > > >=20 > > > Or do you have a better idea? > >=20 > > That looks fragile. My recommendation would be to avoid trying to > > guess how a potentially diverse adapter tree should be handled > > locally in the mux code. To me, it would feel better to introduce > > locking/recursion in i2c_adapter_set_clk_freq() for muxes (and > > address translators), i.e. take inspiration from i2c_transfer() > > and i2c_smbus_xfer(). >=20 > That would be a more robust solution indeed. >=20 > >=20 > > I guess an unlocked __i2c_adapter_set_clk_freq() is needed. > >=20 >=20 > Rethinking the whole locking approach; > If I follow the same locking logic as in i2c_transfer/__i2c_transfer, do I > really need do take any more locks than the root adapter with > I2C_LOCK_ROOT_ADAPTER? > As the frequency can only be lowered, an intermediate i2c message will > not mess anything up? >=20 > If so, do you think i2c_root_adapter() should be moved to i2c-core-base.= c? > Then i2c_adapter_set(_root?)_clk_freq() could lookup the root adapter > and take the lock there. I've reworked this during the weekend and think I've got some my answers. I will send out a new version later today. Thanks! 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