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From: "zhangpengjie (A)" <zhangpengjie2@huawei.com>
To: <catalin.marinas@arm.com>, <will@kernel.org>, <rafael@kernel.org>,
	<lenb@kernel.org>, <robert.moore@intel.com>,
	<beata.michalska@arm.com>, <zhenglifeng1@huawei.com>,
	<zhanjie9@hisilicon.com>, <sumitg@nvidia.com>,
	<cuiyunhui@bytedance.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
	<acpica-devel@lists.linux.dev>, <linuxarm@huawei.com>,
	<jonathan.cameron@huawei.com>, <prime.zeng@hisilicon.com>,
	<wanghuiqiang@huawei.com>, <xuwei5@huawei.com>,
	<lihuisong@huawei.com>, <yubowen8@huawei.com>,
	<wangzhi12@huawei.com>
Subject: Re: [PATCH 0/2] CPPC: reduce FFH feedback-counter sampling skew on arm64
Date: Thu, 30 Apr 2026 18:00:44 +0800	[thread overview]
Message-ID: <aa1284c1-ea26-48ca-a7d7-022027c8228a@huawei.com> (raw)
In-Reply-To: <20260410094145.4132082-1-zhangpengjie2@huawei.com>

Hi all,

Gentle ping on this thread. It has been a while since I posted it.

Could someone please take a look when you have time? If there is anything
I should revise or any additional information needed, I'd be happy to
update it.

Thanks!

On 4/10/2026 5:41 PM, Pengjie Zhang wrote:
> The legacy CPPC feedback-counter path reads the delivered and reference
> performance counters separately.
>
> On arm64 systems using AMU-backed CPPC FFH counters, each FFH read is
> served through a cross-CPU counter read helper. Reading the counters
> separately therefore widens the sampling window between them and can
> skew the delivered/reference ratio used by cpuinfo_cur_freq. Under heavy
> load, the skew is observable as transient values that may exceed the
> platform maximum, as discussed in [1] and [2].
>
> This series adds a small generic hook for architectures that can obtain
> both FFH feedback counters in one operation, while preserving the
> existing per-register read path as the fallback.
>
> Patch 1 adds the generic CPPC hook and uses it from cppc_get_perf_ctrs().
> Patch 2 implements the hook on arm64 by sampling both AMU counters in a
> single operation on the target CPU.
>
> [1] https://lore.kernel.org/all/20231025093847.3740104-4-zengheng4@huawei.com/
> [2] https://lore.kernel.org/all/20231212072617.14756-1-lihuisong@huawei.com/
>
> Signed-off-by: Pengjie Zhang <zhangpengjie2@huawei.com>
>
> Pengjie Zhang (2):
>    ACPI: CPPC: add paired FFH feedback-counter read hook
>    arm64: topology: read CPPC FFH feedback counters in one operation
>
>   arch/arm64/kernel/topology.c | 75 ++++++++++++++++++++++++++++++++----
>   drivers/acpi/cppc_acpi.c     | 58 +++++++++++++++++++++++++---
>   include/acpi/cppc_acpi.h     |  7 ++++
>   3 files changed, 127 insertions(+), 13 deletions(-)
>


      parent reply	other threads:[~2026-04-30 10:01 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-10  9:41 [PATCH 0/2] CPPC: reduce FFH feedback-counter sampling skew on arm64 Pengjie Zhang
2026-04-10  9:41 ` [PATCH 1/2] ACPI: CPPC: add paired FFH feedback-counter read hook Pengjie Zhang
2026-04-10  9:41 ` [PATCH 2/2] arm64: topology: read CPPC FFH feedback counters in one operation Pengjie Zhang
2026-04-30 10:00 ` zhangpengjie (A) [this message]

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