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charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 8/10/2023 12:39 AM, Nishanth Menon wrote: > On 23:09-20230809, Apurva Nandan wrote: >> From: Keerthy >> >> Add 750M, 1G, 1.5G & 2G as the supported frequencies for A72. >> This enables support for Dynamic Frequency Scaling(DFS) >> >> Signed-off-by: Keerthy >> Signed-off-by: Apurva Nandan >> --- >> arch/arm64/boot/dts/ti/k3-j7200.dtsi | 28 ++++++++++++++++++++++++++++ >> 1 file changed, 28 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-j7200.dtsi b/arch/arm64/boot/dts/ti/k3-j7200.dtsi >> index ef73e6d7e858..7222c453096f 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j7200.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-j7200.dtsi >> @@ -48,6 +48,10 @@ cpu0: cpu@0 { >> d-cache-line-size = <64>; >> d-cache-sets = <256>; >> next-level-cache = <&L2_0>; >> + clocks = <&k3_clks 202 2>; >> + clock-names = "cpu"; >> + operating-points-v2 = <&cpu0_opp_table>; >> + #cooling-cells = <2>; /* min followed by max */ >> }; >> >> cpu1: cpu@1 { >> @@ -62,6 +66,30 @@ cpu1: cpu@1 { >> d-cache-line-size = <64>; >> d-cache-sets = <256>; >> next-level-cache = <&L2_0>; >> + clocks = <&k3_clks 203 0>; >> + clock-names = "cpu"; >> + operating-points-v2 = <&cpu0_opp_table>; >> + #cooling-cells = <2>; /* min followed by max */ >> + }; >> + }; >> + >> + cpu0_opp_table: opp-table { >> + compatible = "operating-points-v2"; >> + >> + opp4-2000000000 { >> + opp-hz = /bits/ 64 <2000000000>; >> + }; >> + >> + opp3-1500000000 { >> + opp-hz = /bits/ 64 <1500000000>; >> + }; >> + >> + opp2-1000000000 { >> + opp-hz = /bits/ 64 <1000000000>; >> + }; >> + >> + opp1-750000000 { >> + opp-hz = /bits/ 64 <750000000>; >> }; >> }; >> >> -- >> 2.34.1 >> > Are you sure this is correct to enable all OPPs without efuse bit checks? > > https://www.ti.com/lit/ds/symlink/dra821u-q1.pdf > 7.5 Operating Performance Points > DRA821xC operates only upto 750MHz > DRA821xE at 1GHz > DRA821xL upto 1.5GHz and > DRA821xT upto 2GHz Looks, top SKUs is considered here . After detecting which SKU we are running (I hope TRM should have this information- through efuse or some other register) I think, we can follow two approaches. 1) have OPP table for each SKU and select based SKUs type or 2) Do run time fixup by u-boot based upon SKU type _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel