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From: Frank Li <Frank.li@nxp.com>
To: Thomas Gleixner <tglx@kernel.org>
Cc: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Lucas Stach <l.stach@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	NXP S32 Linux Team <s32@nxp.com>,
	Christophe Lizzi <clizzi@redhat.com>,
	Alberto Ruiz <aruizrui@redhat.com>,
	Enric Balletbo <eballetb@redhat.com>,
	Eric Chanudet <echanude@redhat.com>,
	Larisa Grigore <larisa.grigore@nxp.com>
Subject: Re: [PATCH v6 3/5] irqchip/imx-irqsteer: add NXP S32N79 support
Date: Wed, 11 Mar 2026 11:50:44 -0400	[thread overview]
Message-ID: <abGPVJpvXCOtMcCs@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <87h5qmraum.ffs@tglx>

On Wed, Mar 11, 2026 at 10:09:37AM +0100, Thomas Gleixner wrote:
> On Wed, Mar 11 2026 at 09:11, Ciprian Costea wrote:
> > From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
> >
> > Add support for the interrupt steering controller found in NXP S32N79
> > series automotive SoCs.
> >
> > The S32N79 IRQ_STEER variant differs from the i.MX version by not
> > implementing the CHANCTRL register. To handle this hardware difference,
> > introduce a device type data structure with quirks field. The
> > IRQSTEER_QUIRK_NO_CHANCTRL quirk skips CHANCTRL register access for S32N79
> > variants.
> >
> > The interrupt routing functionality and register layout are otherwise
> > identical between the two variants.
> >
> > Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
> > Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
> > Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>
> I've picked up this one. Can the ARM64 folks please pick up the DT muck
> as that really has close to zero relevance to irqchips.

Did you pick binding one?

PATCH v6 1/5] dt-bindings: interrupt-controller: fsl,irqsteer: add S32N79 support

I have not founnd at linux-next yet.

Frank
>
> Thanks,
>
>         tglx


  reply	other threads:[~2026-03-11 15:51 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-11  8:11 [PATCH v6 0/5] arm64: Add initial support for NXP S32N79 SoC Ciprian Costea
2026-03-11  8:11 ` [PATCH v6 1/5] dt-bindings: interrupt-controller: fsl,irqsteer: add S32N79 support Ciprian Costea
2026-03-11  8:11 ` [PATCH v6 2/5] dt-bindings: arm: fsl: Add NXP S32N79 SoC and RDB board Ciprian Costea
2026-03-11  8:11 ` [PATCH v6 3/5] irqchip/imx-irqsteer: add NXP S32N79 support Ciprian Costea
2026-03-11  9:09   ` Thomas Gleixner
2026-03-11 15:50     ` Frank Li [this message]
2026-03-11 22:21       ` Rob Herring
2026-03-12  2:08         ` Frank Li
2026-03-11  8:11 ` [PATCH v6 4/5] arm64: dts: freescale: Add NXP S32N79 SoC support Ciprian Costea
2026-03-12 12:46   ` Ciprian Marian Costea
2026-03-11  8:11 ` [PATCH v6 5/5] arm64: dts: freescale: Add NXP S32N79-RDB board support Ciprian Costea
2026-03-13 16:33 ` (subset) [PATCH v6 0/5] arm64: Add initial support for NXP S32N79 SoC Frank Li
2026-03-13 16:37 ` Frank Li

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