From: Catalin Marinas <catalin.marinas@arm.com>
To: Vincent Donnefort <vdonnefort@google.com>
Cc: linux-arm-kernel@lists.infradead.org,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
Oliver Upton <oupton@kernel.org>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
Sudeep Holla <sudeep.holla@kernel.org>,
James Morse <james.morse@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Mark Brown <broonie@kernel.org>,
kvmarm@lists.linux.dev
Subject: Re: [PATCH v3 5/5] KVM: arm64: Add SMC hook for SME dvmsync erratum
Date: Tue, 24 Mar 2026 12:56:56 +0000 [thread overview]
Message-ID: <acKKGJG-MUm6TxOm@arm.com> (raw)
In-Reply-To: <acJkEEXKt_GunFLQ@google.com>
On Tue, Mar 24, 2026 at 10:14:40AM +0000, Vincent Donnefort wrote:
> On Mon, Mar 23, 2026 at 04:24:05PM +0000, Catalin Marinas wrote:
> > From: James Morse <james.morse@arm.com>
> >
> > C1-Pro cores with SME have an erratum where TLBI+DSB does not complete
> > all outstanding SME accesses. Instead a DSB needs to be executed on the
> > affecteed CPUs. The implication is pages cannot be unmapped from the
> > host stage2 then provided to the guest. Host SME accesses may occur
> > after this point.
> >
> > This erratum breaks pKVM's guarantees, and the workaround is hard to
> > implement as EL2 and EL1 share a security state meaning EL1 can mask
> > IPI sent by EL2, leading to interrupt blackouts.
> >
> > Instead, do this in EL3. This has the advantage of a separate security
> > state, meaning lower EL cannot mask the IPI. It is also simpler for EL3
> > to know about CPUs that are off or in PSCI's CPU_SUSPEND.
> >
> > Add the needed hook.
> >
> > Signed-off-by: James Morse <james.morse@arm.com>
> > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: Marc Zyngier <maz@kernel.org>
> > Cc: Oliver Upton <oupton@kernel.org>
> > Cc: Will Deacon <will@kernel.org>
> > Cc: Mark Rutland <mark.rutland@arm.com>
> > Cc: Lorenzo Pieralisi <lpieralisi@kernel.org>
> > Cc: Sudeep Holla <sudeep.holla@kernel.org>
>
> In case this goes in before Will's p-guest series and with just a small comment
> below:
>
> Reviewed-by: Vincent Donnefort <vdonnefort@google.com>
Thanks.
I can leave this patch for later, maybe merge it after -rc1.
> > diff --git a/arch/arm64/kvm/hyp/nvhe/mem_protect.c b/arch/arm64/kvm/hyp/nvhe/mem_protect.c
> > index 38f66a56a766..ef8afbdd421b 100644
> > --- a/arch/arm64/kvm/hyp/nvhe/mem_protect.c
> > +++ b/arch/arm64/kvm/hyp/nvhe/mem_protect.c
> > @@ -5,6 +5,8 @@
> > */
> >
> > #include <linux/kvm_host.h>
> > +#include <linux/arm-smccc.h>
> > +
> > #include <asm/kvm_emulate.h>
> > #include <asm/kvm_hyp.h>
> > #include <asm/kvm_mmu.h>
> > @@ -28,6 +30,15 @@ static struct hyp_pool host_s2_pool;
> > static DEFINE_PER_CPU(struct pkvm_hyp_vm *, __current_vm);
> > #define current_vm (*this_cpu_ptr(&__current_vm))
> >
> > +static void pkvm_sme_dvmsync_fw_call(void)
> > +{
> > + if (alternative_has_cap_unlikely(ARM64_WORKAROUND_4193714)) {
> > + struct arm_smccc_res res;
> > +
> > + arm_smccc_1_1_smc(ARM_SMCCC_CPU_WORKAROUND_4193714, &res);
>
> With hyp tracing in kvmarm/next, this should be hyp_smccc_1_1_smc().
One more reason to leave it after -rc1.
--
Catalin
next prev parent reply other threads:[~2026-03-24 12:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-23 16:24 [PATCH v3 0/5] arm64: Work around C1-Pro erratum 4193714 (CVE-2026-0995) Catalin Marinas
2026-03-23 16:24 ` [PATCH v3 1/5] arm64: tlb: Introduce __tlbi_sync_s1ish_{kernel,batch}() for TLB maintenance Catalin Marinas
2026-03-23 16:24 ` [PATCH v3 2/5] arm64: tlb: Pass the corresponding mm to __tlbi_sync_s1ish() Catalin Marinas
2026-03-23 16:24 ` [PATCH v3 3/5] arm64: cputype: Add C1-Pro definitions Catalin Marinas
2026-03-23 16:24 ` [PATCH v3 4/5] arm64: errata: Work around early CME DVMSync acknowledgement Catalin Marinas
2026-03-27 19:15 ` Catalin Marinas
2026-03-23 16:24 ` [PATCH v3 5/5] KVM: arm64: Add SMC hook for SME dvmsync erratum Catalin Marinas
2026-03-24 10:14 ` Vincent Donnefort
2026-03-24 12:56 ` Catalin Marinas [this message]
2026-03-23 17:53 ` [PATCH v3 0/5] arm64: Work around C1-Pro erratum 4193714 (CVE-2026-0995) Mark Rutland
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