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Wed, 26 Nov 2025 09:43:20 -0800 (PST) X-Google-Smtp-Source: AGHT+IFE9auC0BPVxJ4KxcFP48LwF0xTVOASw2feRr55RR8ZX+bZHEyVlBeSIXXDN1cl0ZFO26GaMg== X-Received: by 2002:a05:6a00:2e28:b0:7b2:2d85:ae53 with SMTP id d2e1a72fcca58-7c58c999ebfmr24059760b3a.8.1764178999869; Wed, 26 Nov 2025 09:43:19 -0800 (PST) Received: from [10.216.6.208] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7c3ed471022sm22183967b3a.21.2025.11.26.09.43.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Nov 2025 09:43:19 -0800 (PST) Message-ID: Date: Wed, 26 Nov 2025 23:13:05 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.5.1 Subject: Re: [PATCH v17 07/12] firmware: psci: Implement vendor-specific resets as reboot-mode Content-Language: en-US To: Lorenzo Pieralisi Cc: Bartosz Golaszewski , Bjorn Andersson , Sebastian Reichel , Rob Herring , Sudeep Holla , Souvik Chakravarty , Krzysztof Kozlowski , Conor Dooley , Andy Yan , Mark Rutland , Arnd Bergmann , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org, Vinod Koul , Catalin Marinas , Will Deacon , Florian Fainelli , Moritz Fischer , John Stultz , Matthias Brugger , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Stephen Boyd , Andre Draszik , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Elliot Berman , Xin Liu , Srinivas Kandagatla , Umang Chheda , Nirmesh Kumar Singh References: <20251109-arm-psci-system_reset2-vendor-reboots-v17-0-46e085bca4cc@oss.qualcomm.com> <20251109-arm-psci-system_reset2-vendor-reboots-v17-7-46e085bca4cc@oss.qualcomm.com> <80e68e44-a8e0-464a-056e-9f087ad40d51@oss.qualcomm.com> <1da024e7-efb1-3a1c-cc13-0ae5212ed8bd@oss.qualcomm.com> <682b1a0c-644f-2aff-1860-cbf9a53bc62b@oss.qualcomm.com> From: Shivendra Pratap In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 7JmZCaUZse5UAVKJVtLvYBrv4_Q-NYsM X-Proofpoint-ORIG-GUID: 7JmZCaUZse5UAVKJVtLvYBrv4_Q-NYsM X-Authority-Analysis: v=2.4 cv=bNUb4f+Z c=1 sm=1 tr=0 ts=69273c39 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=aq4WiCt_VBwjG6PfwrMA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTI2MDE0NCBTYWx0ZWRfX5uEy89tWnZpG eevPRKx9ERZ5yMv5rSkcXeCOMe0zJz4MWeEBUFv8ZHV8BTGq4R4XkX7vF9QtWkvgWbr8fJsWNzu O8qMil3f9b/vGm9RVK/IeIhiu8S77YG1iQ5XaSM05pkotxKY7so21ccZleICIZ0Io7Ucz2BX2zp Ho303K+PEMRjwErcJWRhubNWy1Z7+zUWFIPWAVz1PBUbDAutypWJDGUazH4ivbyUzJnXAywTH/9 4fdkWBh7cwdufeYIYuWN53/RiPf0GPAaPmWUGviSAB+Nnv7G3cb93akO6tbo3xCpE+M5lJ9+Psq 1vqwpY0YZ26pvMug5kAChU2g2dPw6jyhrgi39niyvqR9TrJZ77zspfmV4NMFHOaSEQ+8OmHuJJU H3hbQUrLYJlZ96/2sznkx+TUFZkCMQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-25_02,2025-11-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 malwarescore=0 phishscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 suspectscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511260144 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251126_094323_285005_546783A3 X-CRM114-Status: GOOD ( 22.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 11/26/2025 10:48 PM, Lorenzo Pieralisi wrote: > On Wed, Nov 19, 2025 at 05:32:42PM +0530, Shivendra Pratap wrote: >> >> >> On 11/19/2025 3:07 PM, Lorenzo Pieralisi wrote: >>> On Tue, Nov 18, 2025 at 11:11:33PM +0530, Shivendra Pratap wrote: >>> >>> [...] >>> >>>>> Yes this could be a potential way forward but that's decoupled from the >>>>> options below. If we take this route PSCI maintainers should be added >>>>> as maintainers for this reboot mode driver. >>>> >>>> you mean the new psci_reset driver? yes. Maintainer would be PSCI maintainer, >>>> if we create a new psci_reset reboot mode driver. >>> >>> Yes. >>> >>>>>> - struct with pre-built psci reset_types - (warm, soft, cold). Currently >>>>>> only two modes supported, anything other than warm/soft defaults to cold. >>>>>> - vendor resets to be added as per vendor choice, inside psci device tree(SOC specific). >>>>>> - psci_reset registers with reboot-mode for registering vendor resets. Here, we >>>>>> have a problem, the pre-built psci reset_types - (warm, soft, cold) cannot be added via >>>>>> reboot-mode framework. >>>>> >>>>> Why ? >>>> >>>> If we want the new psci_reset to take the reboot-mode framework route, is it ok to >>>> add default modes (warm, cold) in the device tree? >>>> If not, then the design of reboot-mode framework(power:reset:reboot-mode.c) needs to be >>>> further changed to equip this new feature. >>> >>> Well, yes, all it needs to do is allowing prepopulated reboot modes on top >>> of which DT based ones are added. >> >> The mode-cold , adds a third variable to reboot-modes as the first parameter for >> invoke_psci_fn is different for cold vs warm/vendor. >> >> cold reset call : invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0); >> vendor/warm reset call: invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2), vendor, cookiee, 0); >> >> Each mode will have 3 argument - like: >> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ >> MODE , cold reset, reset_type, cookie >> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ - >> COLD , 1 , 0 , 0 >> WARM , 0 , 0 , 0 >> vendor1, 0 ,0x80000000 , 1 >> vendor2, 0 ,0x80000010 , 0 >> >> So reboot-mode framework will now define and support upto three 32 bit arguments for each mode? > > The cookie value is unused for SYSTEM_WARM_RESET, you can encode there whether > it is a cold (SYSTEM_RESET) or warm (SYSTEM_RESET2 - SYSTEM_WARM_RESET) architectural > reset when the magic value(aka reset_type) == 0x0 ? sure that should work. if reset_type is 0, cookie to decide warm vs cold. > > The reboot mode parameters do not necessarily need to map to PSCI function > calls parameters - provided we define that explicitly. got it. Sorry for out of inline question - So the psci_sys_reset() may be looking like below after the changes suggested? Is this on track? if( panic_in_progress() || !psci_reset_cmd.valid) { if ((reboot_mode == REBOOT_WARM || reboot_mode == REBOOT_SOFT) && psci_system_reset2_supported) { /* * reset_type[31] = 0 (architectural) * reset_type[30:0] = 0 (SYSTEM_WARM_RESET) * cookie = 0 (ignored by the implementation) */ invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2), 0, 0, 0); } else { invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0); } } else { invoke_psci_fn(, , , 0); } ------ where psci_reset_cmd is defined like below? struct psci_sysreset { u32 system_reset; // this will be set as PSCI_FN_NATIVE(1_1, SYSTEM_RESET2) or PSCI_0_2_FN_SYSTEM_RESET. u32 reset_type; u32 cookie; bool valid; }; static struct psci_sysreset psci_reset_cmd; -- thanks, Shivendra