From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54772C433E1 for ; Wed, 19 Aug 2020 12:49:36 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 09E57206B5 for ; Wed, 19 Aug 2020 12:49:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="vzCp5LWa"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="UbdAhHiP"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=microchiptechnology.onmicrosoft.com header.i=@microchiptechnology.onmicrosoft.com header.b="UqgcTR2l" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 09E57206B5 Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Content-ID:In-Reply-To:References: Message-ID:Date:Subject:To:From:Reply-To:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=O32t3xK/gjSCblQmxi0PdBcymsAtThr57qrsrvkb+WE=; b=vzCp5LWadEpUI42hsTCHftWOo /uL88UNraN9m6X0TdQuHS9W2BssraQRlZyArCbFn8fIimQLo63H5GyyXCRW33NhNfl7jybjYP/OY2 FyQPRmV607RerXPiOQTFRmY8+PgpTe2Zpm0rahWhZjJZIYfIQFCxY4nN3Gxggs3JPHun3BQOJeN5V D7JVfVMBrnCfIz6A5v+y+4SN31KaGaY85OLvEXyFfznN7W870Vi0pcJGUxTJJFOUsMebvWY2ihKB2 M/d9vMqKIyzYA+vYrOgwpdBbm3RFdzcUABoGnn/Uv8BxUOs5y9g5g5fG8fFLxLq6uy/nKPSjVn7wI QxtmTIMJw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k8NVh-0004Jt-Ln; Wed, 19 Aug 2020 12:48:09 +0000 Received: from esa3.microchip.iphmx.com ([68.232.153.233]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k8NVd-0004Hk-FE for linux-arm-kernel@lists.infradead.org; Wed, 19 Aug 2020 12:48:07 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1597841285; x=1629377285; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-id:content-transfer-encoding: mime-version; bh=D4vsWwVHUAMgSc6gYrLEwaRDZL1zeNuDele0RkVGtfE=; b=UbdAhHiPpsHu7oPk3SA8K9e2Yg2Fcfe/1+WnGKJif7hnu+EzhU+1AwdH moaw/xMJwz4h6y3JMogBBwS0HsqyMgMGylhj3K6Ob4VqafQgo1VlNdfmz /pAA5BnoDK6itaMw83XF7yjmOaPpEGrxRXy99hckj0KV+1zsEdKwOqfgQ 58tLOswj4vPExGnW28FPH5jZluRnkXris8oFpDc7i61HfSbhXBexuW4lZ /eynnAQPEemGDu9HLZTEJV9itZFAaq4M9XNnBWgPWDjGqnnvFWCLgBE/o TkDU5sEr2W7zDQYCGRQ9O6Xy5YvCuQd0aot9gDLek//DZqCQYQquL9CF2 g==; IronPort-SDR: DAcIxOrQqNfsAFna7IFEoI0pUb5tWGgZOrXrL0usraSQwdqXFv9VU++J7528f4dFyjIivg3gjh DNFiSPk6tlhGiEfkLcfyl2Ytxfekn4T/P2fWl06yoJVHFB09uCNzLx1zRycQ8u+Nma/GcgXvJ6 GbkxaTNEjs9ZZgZRXaK5HP1HfVyocyYCUFz6MwN+EEQLwbPmHopN7wZOWlwlsvb6D+LEHH19Xs 2wYUu1FMeVC/Q2iSr8UfQ0d9B91TApYvkY/MKWuZeq/MPSD4Vp5VfbBkIJMuLeFlj7SAi5MdtV mCc= X-IronPort-AV: E=Sophos;i="5.76,331,1592895600"; d="scan'208";a="88602856" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 19 Aug 2020 05:48:02 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Wed, 19 Aug 2020 05:48:00 -0700 Received: from NAM12-DM6-obe.outbound.protection.outlook.com (10.10.215.89) by email.microchip.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3 via Frontend Transport; Wed, 19 Aug 2020 05:47:05 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=bsSwkl9V92J7Lr/ZfwypcNMYvVozrERLZO/hc/DQT4VgMZSRLJlvYzKXkZtLT4hyIcgDzFdli0aVvVfHXWuH0kdliYh523nKpyG7Bxj+edMj0K4QRNS/yPcwW0PQhQwovYOVImn500mgB0xXGBn+eF43NFjUKS85mvrimxGmB+bKcMseyipFk5LKzuDdMr0OFQB9Z5Zku3v1fYmYMC/gK2BD39UR+IJ9/TNJpA04CzDCTA4rHd9HTyXAe3H4M7oInsx5ddMVCJC9mDcw1Vy0Eq1I5XQik3Im9aZjw119B4Da2d4wSR8VWH7DpWo541FvP4jh8LvwDzVreAPVYrglEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=D4vsWwVHUAMgSc6gYrLEwaRDZL1zeNuDele0RkVGtfE=; b=U8o636InrFU7Wq5wat2MHKA5CUWbZ11NYHQFrGMbCa6uPVgVucuzJOPXitYdVRas78UIwbYdeq8KUH8LWgeKURfZthresuAIbb79E6TW0/AjsjQsiqXvCKYsOcXycr+KTkPi8qE99CzzDEKorWGXKY5JAyzup4WAck35+yQtqsImzGFEjnynLmUVfrCh+RQGRyzP3XOjkiigyNot7H9z3jMMLmN2qbUg7P7pMa5SzsKMmjiixcVZVMGgxc7JhVP+mxJpaDgjnWtJHnNdGsqWj7wBmMV+DyLUKvwKVekXkqEbSV8GfZ5UfwUnYSyMz1dm4EqB50YXbNxxS19VyB0ggQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=microchip.com; dmarc=pass action=none header.from=microchip.com; dkim=pass header.d=microchip.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=microchiptechnology.onmicrosoft.com; s=selector2-microchiptechnology-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=D4vsWwVHUAMgSc6gYrLEwaRDZL1zeNuDele0RkVGtfE=; b=UqgcTR2lxbuVJAdsDl/KYLZTyxd8QucI+yKNzN10Wi2Xpd8/QK/KqvSWb9XeltPhqjpgk4dIbntWsRZ0rHPGpjZCwBGgQX5ezwFkXv+K9xi1LECgqg+vTUvumev40o9Qw4m0E+aZAkhMIVIf7CJ+Mx9VacJsWr1HEr9zKGpe1o8= Received: from BYAPR11MB2999.namprd11.prod.outlook.com (2603:10b6:a03:90::17) by BYAPR11MB2999.namprd11.prod.outlook.com (2603:10b6:a03:90::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3305.24; Wed, 19 Aug 2020 12:47:58 +0000 Received: from BYAPR11MB2999.namprd11.prod.outlook.com ([fe80::9d17:b603:ad42:a2d4]) by BYAPR11MB2999.namprd11.prod.outlook.com ([fe80::9d17:b603:ad42:a2d4%7]) with mapi id 15.20.3305.024; Wed, 19 Aug 2020 12:47:58 +0000 From: To: Subject: Re: [PATCH v2 1/4] dt-bindings: media: csi2dc: add bindings for microchip csi2dc Thread-Topic: [PATCH v2 1/4] dt-bindings: media: csi2dc: add bindings for microchip csi2dc Thread-Index: AQHWUQ4jEadYX0HypkGv3SAUXQZrmKkGcjcAgDk5mAA= Date: Wed, 19 Aug 2020 12:47:58 +0000 Message-ID: References: <20200703074416.55272-1-eugen.hristev@microchip.com> <20200703074416.55272-2-eugen.hristev@microchip.com> <20200714025500.GA1187556@bogus> In-Reply-To: <20200714025500.GA1187556@bogus> Accept-Language: en-US, ro-RO Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 authentication-results: kernel.org; dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=microchip.com; x-originating-ip: [86.121.125.215] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: f4a770f3-4fbf-4e15-1b9c-08d8443e19da x-ms-traffictypediagnostic: BYAPR11MB2999: x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:8882; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 1gfqRdDU9CTWhI0IFYA4IUL4UuCCTTxEBM3YUCRX+co3C18vkNCP/nWxn4OZsgGnqVRCa9U8QSfKBzUFKdWsQXD/KVkMsyycLLQsPYVXv4ND+l2bnpX8XfilpqMJaf4u3VEc+EInJfAa+JjxIwg6Wm6v5Ia7AeKycX6UgHZNVPD2b+j/neGIXITJj0dYPzgTvEG5Epmsm5NXNXdy9R/No6ONE68OygXjx1WqGW/7PgQXkFWC5bX38jXxyu2UojXQFRY/r2ZD3Ql5YXKXBYV5w9UCvO5k6FWbmlbey6rIyGLYKK/8mmexne5VHDRb8Hs708IrST3wntDInQCtWl+aBrk+LL+sB3BwqOboRoLP2WvzPwTqKbbnjdukIPmNogVG2ipXZxIC7dT/xQ5YxMn0Q3NAR08rzsmTz7RvvYttD81YY0eN+s3Mf4/2i3ULpoiCXIHgidyEdtJoE7+xh5YHzQ== x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:BYAPR11MB2999.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFS:(136003)(366004)(346002)(396003)(376002)(39860400002)(71200400001)(5660300002)(91956017)(6916009)(8936002)(66946007)(66476007)(8676002)(66446008)(76116006)(2906002)(64756008)(66556008)(83380400001)(4326008)(36756003)(2616005)(6512007)(966005)(86362001)(478600001)(31696002)(316002)(186003)(53546011)(54906003)(31686004)(6486002)(6506007)(26005)(43740500002); DIR:OUT; SFP:1101; x-ms-exchange-antispam-messagedata: jfnU/i+GJUxXurb3r42wI6Q8fMEtzx7XcaE5/P0iiq75jjgErTsqR2G0goqkV1Ft9Uz4AORyX2r3PwqqfVeCaWI0twzLMW0FtzIeT4z3H1QSHGAjX4k1UX8+qWOduHtBf52AHACfsk/mS/kI74iaTOkmjOQ7tvlIV/F1OQnp2CsH6NcNlGobalNPAkr66e5nfZ3xVVID8mKAFImmJ7AvnMuYaIRROH9tvdX+PF3ALrlDwzhX05jBL1nvx9OjSC8fXzmqrFWMANS9qGgzP7npbJJSze59Kb0fithzUNefP6Om9HYPm13wHk+a6YnaDi/wf1Lm9mCt6VTubT5a13fx9R2PlflTpFt7aJ85Kwe41CexVg3B994EZ6CiHiUeJkxv3ZwB//l9nGg/l1kBS893ixGDRbr50cBxgdOHmIokVBEDPhnxDZPh+8Set8IzJqiKBGFuXAmQojelPmvGRuVY4UT4q/giankEQw1ViRiqPFuR7xYht5r/Ele0d4x2TXxULBjZDbPCMGcxGtJUwhxnyNXCnj71qfRbVpUch7e+AS1fw8T37fQKSWtivKTImvFxQ5sWMk8kDcygOLgFGpsJnXBEND3Di9hWNiOEzPj8EBy5Qy+TqT/akHKrcWsfGUObY/Qig0ucXnaKZZCOYo/Evg== x-ms-exchange-transport-forked: True Content-ID: MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR11MB2999.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f4a770f3-4fbf-4e15-1b9c-08d8443e19da X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Aug 2020 12:47:58.3521 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: f7ODkU+XeWSt4MocT2PdszuvF89MHeyCfk9Nb6O6aaL3sqdU3bKxdPhhtH3L1APeoWMAS6KRdbdPwjF+LSUfKUbQHUFGFKEqSBpKXQVlX2c= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB2999 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200819_084805_746748_D1CFDB17 X-CRM114-Status: GOOD ( 27.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, hverkuil@xs4all.nl, sakari.ailus@iki.fi, mchehab@kernel.org, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 14.07.2020 05:55, Rob Herring wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On Fri, Jul 03, 2020 at 10:44:13AM +0300, Eugen Hristev wrote: >> Add bindings documentation for microchip CSI2 Demultiplexer controller. >> >> CSI2DC is a demultiplexer from Synopsys IDI interface specification to >> parallel interface connection or direct memory access. >> >> Signed-off-by: Eugen Hristev >> --- >> Changes in v2: >> - fixed warnings reported by dt_binding_check >> >> >> .../bindings/media/microchip,csi2dc.yaml | 185 ++++++++++++++++++ >> 1 file changed, 185 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/media/microchip,csi2dc.yaml >> >> diff --git a/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml b/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml >> new file mode 100644 >> index 000000000000..b7c46f7ad2a4 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml >> @@ -0,0 +1,185 @@ >> +# SPDX-License-Identifier: GPL-2.0-only > > New bindings should be: > > (GPL-2.0-only OR BSD-2-Clause) > >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/media/microchip,csi2dc.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Microchip CSI2 Demux Controller (CSI2DC) >> + >> +maintainers: >> + - Eugen Hristev >> + >> +description: >> + CSI2DC - Camera Serial Interface 2 Demux Controller >> + >> + CSI2DC is a hardware block that receives incoming data from an IDI interface >> + and filters packets based on their data type and virtual channel identifier, >> + then converts the byte stream into a cross clock domain to a pixel stream >> + to a parallel interface that can be read by a sensor controller. >> + >> + CSI2DC provides two pipes, one video pipe and one data pipe. Video pipe >> + is connected to a sensor controller and the data pipe is accessible >> + as a DMA slave port to a DMA controller. >> + >> + CSI2DC supports a single 'port' node as a source pad with Synopsys 32-bit >> + IDI interface. The connected endpoint must be a IDI interface compatible >> + device (like Synopsys CSI2HOST) , that can provide 32-bit IDI interface >> + connection as sink pad. >> + It should contain one 'port' child node with one child 'endpoint' node. >> + This node should always have the 'reg' property as 0, being the first child >> + node. > > This information should be expressed as a schema. Hello Rob, Do you mean that I should add these explanations inside the schema properties description ? Or I should enforce these in some other way ? The schema already includes what is written here (for example, const reg 0 for the child node, etc.) Or maybe you wanted to tell me something else ? Thanks, Eugen > >> + For media entity and endpoints please refer to the bindings defined in >> + Documentation/devicetree/bindings/media/video-interfaces.txt. >> + For Synopsys IDI interface please refer to >> + Documentation/devicetree/bindings/media/snps,dw-csi-plat.txt >> + > >> + CSI2DC supports one 'port' node as sink pad with parallel interface. This is >> + called video pipe. >> + The reg property inside this 'port' node must have the 'reg' property as 1, >> + being the second child node. >> + This node must have one 'endpoint', and this 'endpoint' is related to the >> + virtual channel identifier. >> + The 'reg' property inside this 'endpoint' represents the CSI2 virtual channel >> + identifier. >> + This 'endpoint' can then be used as a source pad for another controller >> + (next in pipeline). >> + Please refer to the bindings defined in >> + Documentation/devicetree/bindings/media/video-interfaces.txt. > > And all this. > >> + >> + CSI2DC must have two clocks to function correctly. One clock is the >> + peripheral clock for the inside functionality of the hardware block. >> + This is named 'pclk'. The second clock must be the cross domain clock, >> + in which CSI2DC will perform clock crossing. This clock must be fed >> + by the next controller in pipeline, which usually is a sensor controller. >> + Normally this clock should be given by this sensor controller who >> + is also a clock source. This clock is named 'scck', sensor controller clock. > > Better to be part of 'clocks'. > >> + >> + CSI2DC also supports direct access to the data through AHB, via DMA channel, >> + called data pipe. >> + Because of this, the sink 'port' child node (second) is not mandatory. >> + If the sink 'port' child node is missing, only data pipe is available. >> + >> +properties: >> + compatible: >> + const: microchip,sama7g5-csi2dc >> + >> + reg: >> + description: >> + Physical base address and length of the registers set for the device. > > That is every 'reg' prop. Drop. > >> + maxItems: 1 >> + >> + clocks: >> + maxItems: 2 >> + >> + clock-names: >> + items: >> + - const: pclk >> + - const: scck >> + >> + microchip,clk-gated: >> + type: boolean >> + description: >> + If present, indicates that the clock is gated. >> + Otherwise, the clock is free-running. >> + >> + microchip,inter-line-delay: >> + allOf: >> + - $ref: /schemas/types.yaml#/definitions/uint32 >> + - minimum: 1 >> + - maximum: 16 >> + default: 16 >> + description: >> + Indicates how many clock cycles should be introduced between each line. >> + >> + port@0: >> + type: object >> + description: >> + Input port node, single endpoint describing the input pad. >> + >> + properties: >> + reg: >> + const: 0 >> + >> + endpoint: >> + type: object >> + >> + properties: >> + remote-endpoint: true >> + >> + required: >> + - remote-endpoint >> + >> + additionalProperties: false >> + >> + additionalProperties: false >> + >> + port@1: >> + type: object >> + description: >> + Output port node, single endpoint, describing the output pad. >> + >> + properties: >> + '#address-cells': >> + const: 1 >> + >> + '#size-cells': >> + const: 0 >> + >> + reg: >> + const: 1 >> + >> + patternProperties: >> + "^endpoint@[0-9a-f]$": > > Looks like only [0-3] is valid. > >> + type: object >> + >> + properties: >> + reg: >> + enum: [0, 1, 2, 3] >> + description: virtual channel for the endpoint >> + >> + remote-endpoint: true >> + >> + required: >> + - remote-endpoint >> + - reg >> + >> + additionalProperties: false >> + >> + additionalProperties: false >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + - clock-names >> + - port@0 >> + >> +examples: >> + - | >> + csi2dc@e1404000 { >> + compatible = "microchip,sama7g5-csi2dc"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + reg = <0xe1404000 0x500>; >> + clocks = <&pclk>, <&scck>; >> + clock-names = "pclk", "scck"; >> + >> + port@0 { >> + reg = <0>; /* must be 0, first child port */ >> + csi2dc_in: endpoint { /* input from IDI interface */ >> + remote-endpoint = <&csi2host_out>; >> + }; >> + }; >> + >> + port@1 { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + reg = <1>; /* must be 1, second child port */ >> + csi2dc_out: endpoint@2 { >> + reg = <2>; /* virtual channel identifier */ >> + remote-endpoint = <&xisc_in>; /* output to sensor controller */ >> + }; >> + }; >> + }; >> + >> +... >> -- >> 2.25.1 >> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel