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Tue, 31 Aug 2021 15:40:40 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1B40410002A; Tue, 31 Aug 2021 15:40:40 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 0306424692E; Tue, 31 Aug 2021 15:40:40 +0200 (CEST) Received: from [10.211.11.146] (10.75.127.44) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 31 Aug 2021 15:40:38 +0200 Subject: Re: [PATCH v16 02/14] counter: stm32-timer-cnt: Provide defines for slave mode selection To: William Breathitt Gray , CC: , , , , , , , , , , , , , , , , References: From: Fabrice Gasnier Message-ID: Date: Tue, 31 Aug 2021 15:40:37 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-08-31_05,2021-08-31_01,2020-04-07_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210831_064132_331022_44859093 X-CRM114-Status: GOOD ( 21.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 8/27/21 5:47 AM, William Breathitt Gray wrote: > The STM32 timer permits configuration of the counter encoder mode via > the slave mode control register (SMCR) slave mode selection (SMS) bits. > This patch provides preprocessor defines for the supported encoder > modes. > > Cc: Fabrice Gasnier > Signed-off-by: William Breathitt Gray > --- > drivers/counter/stm32-timer-cnt.c | 16 ++++++++-------- > include/linux/mfd/stm32-timers.h | 4 ++++ > 2 files changed, 12 insertions(+), 8 deletions(-) Hi William, You can add my: Reviewed-by: Fabrice Gasnier Thanks, Fabrice > > diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c > index 3fb0debd7425..1fbc46f4ee66 100644 > --- a/drivers/counter/stm32-timer-cnt.c > +++ b/drivers/counter/stm32-timer-cnt.c > @@ -93,16 +93,16 @@ static int stm32_count_function_get(struct counter_device *counter, > regmap_read(priv->regmap, TIM_SMCR, &smcr); > > switch (smcr & TIM_SMCR_SMS) { > - case 0: > + case TIM_SMCR_SMS_SLAVE_MODE_DISABLED: > *function = STM32_COUNT_SLAVE_MODE_DISABLED; > return 0; > - case 1: > + case TIM_SMCR_SMS_ENCODER_MODE_1: > *function = STM32_COUNT_ENCODER_MODE_1; > return 0; > - case 2: > + case TIM_SMCR_SMS_ENCODER_MODE_2: > *function = STM32_COUNT_ENCODER_MODE_2; > return 0; > - case 3: > + case TIM_SMCR_SMS_ENCODER_MODE_3: > *function = STM32_COUNT_ENCODER_MODE_3; > return 0; > default: > @@ -119,16 +119,16 @@ static int stm32_count_function_set(struct counter_device *counter, > > switch (function) { > case STM32_COUNT_SLAVE_MODE_DISABLED: > - sms = 0; > + sms = TIM_SMCR_SMS_SLAVE_MODE_DISABLED; > break; > case STM32_COUNT_ENCODER_MODE_1: > - sms = 1; > + sms = TIM_SMCR_SMS_ENCODER_MODE_1; > break; > case STM32_COUNT_ENCODER_MODE_2: > - sms = 2; > + sms = TIM_SMCR_SMS_ENCODER_MODE_2; > break; > case STM32_COUNT_ENCODER_MODE_3: > - sms = 3; > + sms = TIM_SMCR_SMS_ENCODER_MODE_3; > break; > default: > return -EINVAL; > diff --git a/include/linux/mfd/stm32-timers.h b/include/linux/mfd/stm32-timers.h > index f8db83aedb2b..5f5c43fd69dd 100644 > --- a/include/linux/mfd/stm32-timers.h > +++ b/include/linux/mfd/stm32-timers.h > @@ -82,6 +82,10 @@ > #define MAX_TIM_ICPSC 0x3 > #define TIM_CR2_MMS_SHIFT 4 > #define TIM_CR2_MMS2_SHIFT 20 > +#define TIM_SMCR_SMS_SLAVE_MODE_DISABLED 0 /* counts on internal clock when CEN=1 */ > +#define TIM_SMCR_SMS_ENCODER_MODE_1 1 /* counts TI1FP1 edges, depending on TI2FP2 level */ > +#define TIM_SMCR_SMS_ENCODER_MODE_2 2 /* counts TI2FP2 edges, depending on TI1FP1 level */ > +#define TIM_SMCR_SMS_ENCODER_MODE_3 3 /* counts on both TI1FP1 and TI2FP2 edges */ > #define TIM_SMCR_TS_SHIFT 4 > #define TIM_BDTR_BKF_MASK 0xF > #define TIM_BDTR_BKF_SHIFT(x) (16 + (x) * 4) > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel