From: Michal Simek <monstr@monstr.eu>
To: arm-soc <arm@kernel.org>, SoC Team <soc@kernel.org>
Cc: git <git@xilinx.com>, linux-arm <linux-arm-kernel@lists.infradead.org>
Subject: [GIT PULL] ARM: dts: Xilinx DT changes for v5.8
Date: Fri, 29 May 2020 10:20:02 +0200 [thread overview]
Message-ID: <ad25cfb0-156c-9bf6-a7b8-e30a7a859135@monstr.eu> (raw)
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Hi,
please pull these two small fixed to your tree. The branch is based on
v5.6-rc1 but I didn't wanted to rebase it on v5.7-rc1 because then dates
will be changed.
Anyway tried to merge it with Linus's and linux-next trees and I can't
see any collisions that's why it shouldn't be a problem for you too.
Thanks,
Michal
The following changes since commit bb6d3fb354c5ee8d6bde2d576eb7220ea09862b9:
Linux 5.6-rc1 (2020-02-09 16:08:48 -0800)
are available in the Git repository at:
https://github.com/Xilinx/linux-xlnx.git tags/zynqmp-dt-for-v5.8
for you to fetch changes up to 818227321d331c583c4563a8275eb187b98475df:
arm64: zynqmp: Fix GIC compatible property (2020-04-15 10:39:21 +0200)
----------------------------------------------------------------
arm64: dt: ZynqMP DT fixes for v5.8
- Add AES mode and fix GIC node
----------------------------------------------------------------
Kalyani Akula (1):
arm64: zynqmp: Add Xilinx AES node
Michal Simek (1):
arm64: zynqmp: Fix GIC compatible property
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
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