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Tue, 18 Feb 2025 09:41:58 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id D30AE40044; Tue, 18 Feb 2025 09:40:35 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id D7E7C2F80C7; Tue, 18 Feb 2025 09:39:32 +0100 (CET) Received: from [10.48.87.62] (10.48.87.62) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 18 Feb 2025 09:39:32 +0100 Message-ID: Date: Tue, 18 Feb 2025 09:39:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/8] dt-bindings: spi: Add STM32 OSPI controller To: Philipp Zabel , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandre Torgue , Maxime Coquelin , Greg Kroah-Hartman , Arnd Bergmann , Catalin Marinas , Will Deacon CC: , , , , , References: <20250210131826.220318-1-patrice.chotard@foss.st.com> <20250210131826.220318-2-patrice.chotard@foss.st.com> <67fe157ce8ca3c3c4e08451da52f7c94f73439b2.camel@pengutronix.de> Content-Language: en-US From: Patrice CHOTARD In-Reply-To: <67fe157ce8ca3c3c4e08451da52f7c94f73439b2.camel@pengutronix.de> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.48.87.62] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-18_03,2025-02-18_01,2024-11-22_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250218_004218_364680_2CC34149 X-CRM114-Status: GOOD ( 15.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2/17/25 10:17, Philipp Zabel wrote: > On Mo, 2025-02-10 at 14:18 +0100, patrice.chotard@foss.st.com wrote: >> From: Patrice Chotard >> >> Add device tree bindings for the STM32 OSPI controller. >> >> Main features of the Octo-SPI controller : >> - support sNOR / sNAND / HyperRAM™ and HyperFlash™ devices. >> - Three functional modes: indirect, automatic-status polling, >> memory-mapped. >> - Up to 4 Gbytes of external memory can be addressed in indirect >> mode (per physical port and per CS), and up to 256 Mbytes in >> memory-mapped mode (combined for both physical ports and per CS). >> - Single-, dual-, quad-, and octal-SPI communication. >> - Dual-quad communication. >> - Single data rate (SDR) and double transfer rate (DTR). >> - Maximum target frequency is 133 MHz for SDR and 133 MHz for DTR. >> - Data strobe support. >> - DMA channel for indirect mode. >> - Double CS mapping that allows two external flash devices to be >> addressed with a single OCTOSPI controller mapped on a single >> OCTOSPI port. >> >> Signed-off-by: Patrice Chotard >> --- >> .../bindings/spi/st,stm32mp25-ospi.yaml | 105 ++++++++++++++++++ >> 1 file changed, 105 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml >> >> diff --git a/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml b/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml >> new file mode 100644 >> index 000000000000..5f276f27dc4c >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml >> @@ -0,0 +1,105 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/spi/st,stm32mp25-ospi.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: STMicroelectronics STM32 Octal Serial Peripheral Interface (OSPI) >> + >> +maintainers: >> + - Patrice Chotard >> + >> +allOf: >> + - $ref: spi-controller.yaml# >> + >> +properties: >> + compatible: >> + const: st,stm32mp25-ospi >> + >> + reg: >> + maxItems: 1 >> + >> + memory-region: >> + description: >> + Memory region to be used for memory-map read access. >> + In memory-mapped mode, read access are performed from the memory >> + device using the direct mapping. >> + maxItems: 1 >> + >> + clocks: >> + maxItems: 1 >> + >> + interrupts: >> + maxItems: 1 >> + >> + resets: >> + items: >> + - description: phandle to OSPI block reset >> + - description: phandle to delay block reset > > Are you positive that these will only ever have to be reset together? > Otherwise I'd add a reset-names property just in case. Yes i confirm that these both reset are reset together. Thanks Patrice > > regards > Philipp