From: Mark Rutland <mark.rutland@arm.com>
To: Jinjie Ruan <ruanjinjie@huawei.com>
Cc: vladimir.murzin@arm.com, peterz@infradead.org,
Catalin Marinas <catalin.marinas@arm.com>,
linux-kernel@vger.kernel.org, tglx@kernel.org, luto@kernel.org,
Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 10/10] arm64: Check DAIF (and PMR) at task-switch time
Date: Wed, 8 Apr 2026 10:08:12 +0100 [thread overview]
Message-ID: <adYa_LVdtYtNTd-h@J2N7QTR9R3> (raw)
In-Reply-To: <26642def-7676-e081-98f3-9ab883048375@huawei.com>
On Wed, Apr 08, 2026 at 10:17:56AM +0800, Jinjie Ruan wrote:
> On 2026/4/7 21:16, Mark Rutland wrote:
> > +static inline void debug_switch_state(void)
> > +{
> > + if (system_uses_irq_prio_masking()) {
> > + unsigned long daif_expected = 0;
> > + unsigned long daif_actual = read_sysreg(daif);
> > + unsigned long pmr_expected = GIC_PRIO_IRQOFF;
> > + unsigned long pmr_actual = read_sysreg_s(SYS_ICC_PMR_EL1);
> > +
> > + WARN_ONCE(daif_actual != daif_expected ||
> > + pmr_actual != pmr_expected,
> > + "Unexpected DAIF + PMR: 0x%lx + 0x%lx (expected 0x%lx + 0x%lx)\n",
> > + daif_actual, pmr_actual,
> > + daif_expected, pmr_expected);
> > + } else {
> > + unsigned long daif_expected = DAIF_PROCCTX_NOIRQ;
> > + unsigned long daif_actual = read_sysreg(daif);
> > +
> > + WARN_ONCE(daif_actual != daif_expected,
> > + "Unexpected DAIF value: 0x%lx (expected 0x%lx)\n",
> > + daif_actual, daif_expected);
> > + }
>
> This logic seems consistent with arm64's local_irq_disable()
> implementation. Do we need to wrap these debug checks in a config option
> (e.g., CONFIG_ARM64_DEBUG_PRIORITY_MASKING) to avoid unnecessary overhead?
Possibly. I'd expected this was infrequent enough that there wouldn't be
a noticeable overhead, but admittedly I don't have numbers.
Given Thomas seems happy to queue the preparatory bits, (hopefully) we
can queue the rest of this as-is, and I reckon it's probably best to
drop this patch for now and follow up with a better version later.
There are some other bits of state I'd like to check here (e.g. PAN),
and I think this requires a bit more work.
Thanks for looking at this!
Mark.
>
>
> __schedule()
> -> local_irq_disable()
> -> arch_local_irq_disable()
>
> 52 static __always_inline void __daif_local_irq_disable(void)
> 53 {
> 54 barrier();
> 55 asm volatile("msr daifset, #3");
> 56 barrier();
> 57 }
> 58
> 59 static __always_inline void __pmr_local_irq_disable(void)
> 60 {
> 61 if (IS_ENABLED(CONFIG_ARM64_DEBUG_PRIORITY_MASKING)) {
> 62 u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
> 63 WARN_ON_ONCE(pmr != GIC_PRIO_IRQON && pmr !=
> GIC_PRIO_IRQOFF);
> 64 }
> 65
> 66 barrier();
> 67 write_sysreg_s(GIC_PRIO_IRQOFF, SYS_ICC_PMR_EL1);
> 68 barrier();
> 69 }
> 70
> 71 static inline void arch_local_irq_disable(void)
> 72 {
> 73 if (system_uses_irq_prio_masking()) {
> 74 __pmr_local_irq_disable();
> 75 } else {
> 76 __daif_local_irq_disable();
> 77 }
> 78 }
>
>
> > +}
> > +
> > /*
> > * Thread switching.
> > */
> > @@ -708,6 +731,8 @@ struct task_struct *__switch_to(struct task_struct *prev,
> > {
> > struct task_struct *last;
> >
> > + debug_switch_state();
> > +
> > fpsimd_thread_switch(next);
> > tls_thread_switch(next);
> > hw_breakpoint_thread_switch(next);
next prev parent reply other threads:[~2026-04-08 9:08 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-07 13:16 [PATCH 00/10] arm64/entry: Mark Rutland
2026-04-07 13:16 ` [PATCH 01/10] entry: Fix stale comment for irqentry_enter() Mark Rutland
2026-04-08 1:14 ` Jinjie Ruan
2026-04-07 13:16 ` [PATCH 02/10] entry: Remove local_irq_{enable,disable}_exit_to_user() Mark Rutland
2026-04-08 1:18 ` Jinjie Ruan
2026-04-07 13:16 ` [PATCH 03/10] entry: Move irqentry_enter() prototype later Mark Rutland
2026-04-08 1:21 ` Jinjie Ruan
2026-04-07 13:16 ` [PATCH 04/10] entry: Split kernel mode logic from irqentry_{enter,exit}() Mark Rutland
2026-04-08 1:32 ` Jinjie Ruan
2026-04-07 13:16 ` [PATCH 05/10] entry: Split preemption from irqentry_exit_to_kernel_mode() Mark Rutland
2026-04-08 1:40 ` Jinjie Ruan
2026-04-08 9:17 ` Jinjie Ruan
2026-04-08 10:19 ` Mark Rutland
2026-04-07 13:16 ` [PATCH 06/10] arm64: entry: Don't preempt with SError or Debug masked Mark Rutland
2026-04-08 1:47 ` Jinjie Ruan
2026-04-07 13:16 ` [PATCH 07/10] arm64: entry: Consistently prefix arm64-specific wrappers Mark Rutland
2026-04-08 1:49 ` Jinjie Ruan
2026-04-07 13:16 ` [PATCH 08/10] arm64: entry: Use irqentry_{enter_from,exit_to}_kernel_mode() Mark Rutland
2026-04-08 1:50 ` Jinjie Ruan
2026-04-07 13:16 ` [PATCH 09/10] arm64: entry: Use split preemption logic Mark Rutland
2026-04-08 1:52 ` Jinjie Ruan
2026-04-07 13:16 ` [PATCH 10/10] arm64: Check DAIF (and PMR) at task-switch time Mark Rutland
2026-04-08 2:17 ` Jinjie Ruan
2026-04-08 9:08 ` Mark Rutland [this message]
2026-04-07 21:08 ` [PATCH 00/10] arm64/entry: Thomas Gleixner
2026-04-08 9:02 ` Mark Rutland
2026-04-08 9:06 ` Catalin Marinas
2026-04-08 10:14 ` Thomas Gleixner
2026-04-08 9:19 ` Peter Zijlstra
2026-04-08 17:25 ` (subset) " Catalin Marinas
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