From: Jinjie Ruan <ruanjinjie@huawei.com>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: <will@kernel.org>, <chenhuacai@kernel.org>, <kernel@xen0n.name>,
<hca@linux.ibm.com>, <gor@linux.ibm.com>,
<agordeev@linux.ibm.com>, <borntraeger@linux.ibm.com>,
<svens@linux.ibm.com>, <oleg@redhat.com>, <tglx@kernel.org>,
<mingo@redhat.com>, <bp@alien8.de>, <dave.hansen@linux.intel.com>,
<hpa@zytor.com>, <arnd@arndb.de>, <shuah@kernel.org>,
<kevin.brodsky@arm.com>, <yeoreum.yun@arm.com>,
<anshuman.khandual@arm.com>, <thuth@redhat.com>,
<ryan.roberts@arm.com>, <mark.rutland@arm.com>, <song@kernel.org>,
<ziyao@disroot.org>, <linusw@kernel.org>,
<schuster.simon@siemens-energy.com>, <jremus@linux.ibm.com>,
<akpm@linux-foundation.org>, <mathieu.desnoyers@efficios.com>,
<kmal@cock.li>, <dvyukov@google.com>,
<reddybalavignesh9979@gmail.com>, <x86@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <loongarch@lists.linux.dev>,
<linux-s390@vger.kernel.org>, <linux-arch@vger.kernel.org>,
<linux-kselftest@vger.kernel.org>
Subject: Re: [PATCH v14 3/4] arm64: Use generic TIF bits for common thread flags
Date: Thu, 2 Apr 2026 09:41:01 +0800 [thread overview]
Message-ID: <adf2b4a8-27d6-59ad-74f3-ea43e07fe84f@huawei.com> (raw)
In-Reply-To: <acz5mOrm6_E1UBwV@arm.com>
On 2026/4/1 18:55, Catalin Marinas wrote:
> On Fri, Mar 20, 2026 at 06:42:21PM +0800, Jinjie Ruan wrote:
>> Use the generic TIF bits defined in <asm-generic/thread_info_tif.h> for
>> standard thread flags (TIF_SIGPENDING, TIF_NEED_RESCHED, TIF_NOTIFY_RESUME,
>> TIF_RESTORE_SIGMASK, TIF_SINGLESTEP, etc.) instead of defining
>> them locally.
>>
>> Arm64-specific bits (TIF_FOREIGN_FPSTATE, TIF_MTE_ASYNC_FAULT, TIF_SVE,
>> TIF_SSBD, etc.) are renumbered to start at bit 16 to avoid conflicts.
>>
>> This enables RSEQ optimizations which require CONFIG_HAVE_GENERIC_TIF_BITS
>> combined with the generic entry infrastructure (already used by arm64).
>>
>> By the way, remove TIF_FREEZE because this flag became unused since
>> commit d88e4cb67197 ("freezer: remove now unused TIF_FREEZE").
>>
>> Cc: Thomas Gleixner <tglx@kernel.org>
>> Reviewed-by: Kevin Brodsky <kevin.brodsky@arm.com>
>> Reviewed-by: Linus Walleij <linusw@kernel.org>
>> Reviewed-by: Yeoreum Yun <yeoreum.yun@arm.com>
>> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
>
> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
>
> Given that it's touching multiple trees, I guess it's a series for
> Andrew?
Yes, this series touches x86, arm64, s390 and loongarch. It's best for
Andrew to help merge this in the -mm tree.
Moreover, the latter two arm64-related patches depend on patch serise
"arm64:
entry: Convert to Generic Entry" v14 being merged first, while the first
two patches can be merged in advance.
>
next prev parent reply other threads:[~2026-04-02 1:41 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-20 10:42 [PATCH v14 0/4] arm64: Use generic TIF bits for common thread flags Jinjie Ruan
2026-03-20 10:42 ` [PATCH v14 1/4] s390: Rename TIF_SINGLE_STEP to TIF_SINGLESTEP Jinjie Ruan
2026-03-20 10:42 ` [PATCH v14 2/4] asm-generic: Move TIF_SINGLESTEP to generic TIF bits Jinjie Ruan
2026-04-09 7:42 ` Mark Rutland
2026-04-10 3:39 ` Jinjie Ruan
2026-03-20 10:42 ` [PATCH v14 3/4] arm64: Use generic TIF bits for common thread flags Jinjie Ruan
2026-04-01 10:55 ` Catalin Marinas
2026-04-02 1:41 ` Jinjie Ruan [this message]
2026-03-20 10:42 ` [PATCH v14 4/4] selftests: sud_test: Support aarch64 Jinjie Ruan
2026-03-20 13:40 ` Linus Walleij
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