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Tue, 22 Sep 2026 06:06:35 -0700 (PDT) X-Received: by 2002:a05:6820:4d52:20b0:6bf:f0f9:a3b3 with SMTP id 006d021491bc7-6cb2ce213b2mr9754497eaf.2.1790082395212; Tue, 22 Sep 2026 06:06:35 -0700 (PDT) Received: from [192.168.202.12] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6aaa44d1aa9sm1034255a12.10.2026.09.22.06.06.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 22 Sep 2026 06:06:34 -0700 (PDT) Message-ID: Date: Tue, 22 Sep 2026 15:06:30 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/9] soc: qcom: geni: Derive SE clock configuration from OPP table on SA8255P To: Praveen Talari , Ulf Hansson , Mukesh Kumar Savaliya Cc: Sudeep Holla , Cristian Marussi , Ulf Hansson , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Jiri Slaby , Mark Brown , Viken Dadhaniya , Andi Shyti , mukesh.savaliya@oss.qualcomm.com, chandana.chiluveru@oss.qualcomm.com, arm-scmi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org, linux-spi@vger.kernel.org, linux-i2c@vger.kernel.org, Abel Vesa References: <20260827-derive_clk_perf_tbl_from_perf_domain_opp_table-v2-0-091697dbeb02@oss.qualcomm.com> <177884a8-902f-49be-8fcb-b2bec3ec7d6c@oss.qualcomm.com> <0f5494c7-c3c1-4668-a09f-d8c43d1c58b9@oss.qualcomm.com> <6c28e672-349c-49cb-892d-ec521b3004bf@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <6c28e672-349c-49cb-892d-ec521b3004bf@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIyMDE5MCBTYWx0ZWRfX1WCudeojvmaj BLwQ27qMOdXuAmvbkiCh0OYlkaQ5fUzLgkJuoYxC/FrUKMOaq+mEFNpWNfdBYQFDiHdjGser/x4 sgwvoJkZLRkFSm1kVi/G/qUGj1Xj/Nv1Un4aDc8sKjwTse21RKQE+rDsE9edcDZTy0dUraTNdpN Q2KuIrz1W1EohUSM+syXYVlVbIlNymSnCHJq7U+XHYQjSjvHttKgwefjpZyLq5dAhu4A3pyVP+D KbBWneO3dPPKtEv8o2hsfok8P/r42ID9LaMMzeoqK2QpyoVW/DsZlM1/crQCEVTuU20TTt9ySED SfZsIkBPOdMU7hOiKUYwncPFO3tz8pME3ZoA9YiN21sJlqDDDicYSDeCqzHsWTNuHtfM9ymchDo fvnAZ1x2/tpfcFutty3h1Kkdxdz9dEYCUnBij7jf+QNZDG1jkQWZG+TUzethQoRq0xm+ZuW0/vJ wqXqkVnMnbpsyIHQSPQ== X-Authority-Analysis: v=2.4 cv=IYYSymqa c=1 sm=1 tr=0 ts=6ab27d5c cx=c_pps a=lkkFf9KBb43tY3aOjL++dA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=V-jRUn7sFLrw_WHHsgMA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=k4UEASGLJojhI9HsvVT1:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIyMDE5MCBTYWx0ZWRfXxuKYgCkhjbJo H/Womq5N70+sVdChc8Hjhm9LMuuG1Ycw6lfoWKv8v3X8sgbNeniu552hCx6VNHzbLJBkyQSyDan zvCSbnmYICbBhVZdKUQ6VqR96bPVG2A= X-Proofpoint-ORIG-GUID: pmTJIfDY7S2l_KqRWI2qJPheRIz6X-Xa X-Proofpoint-GUID: pmTJIfDY7S2l_KqRWI2qJPheRIz6X-Xa X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-22_01,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 spamscore=0 phishscore=0 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609220190 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260922_060637_508931_196B055C X-CRM114-Status: GOOD ( 21.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 9/11/26 7:33 PM, Praveen Talari wrote: > Hi Konrad, > > On 04-09-2026 14:30, Konrad Dybcio wrote: >> On 9/4/26 9:56 AM, Ulf Hansson wrote: >>> On Tue, Sep 1, 2026 at 6:48 PM Praveen Talari >>> wrote: >> [...] >> >>> So geni_se_clk_freq_match() is used by two consumer drivers today, >>> drivers/spi/spi-geni-qcom.c and drivers/tty/serial/qcom_geni_serial.c. >>> >>> Beyond the $subject series, there will be even more consumer drivers >>> that call these platform specific functions. As I said above, I don't >>> think this is moving things in the right direction. >>> >>> If this can't be solved with generic frameworks (clocks and OPP), >>> please clarify why so we can figure out a better way forward. >> The way I read it, isn't geni_se_clk_freq_match() more or less >> dev_pm_opp_find_freq_exact() called in a loop with an increasing >> divider? > Currently, geni_se_clk_freq_match() relies on clk_perf_tbl to > determine the source clock index and divider corresponding to > a requested frequency. So I think the part that blocks going in the direction I suggested is that the index and divider values you mentioned are then required to be fed into some GENI-internal registers: -- drivers/spi/spi-geni-qcom.c clk_sel = idx & CLK_SEL_MSK; m_clk_cfg = (div << CLK_DIV_SHFT) | SER_CLK_EN; writel(clk_sel, se->base + SE_GENI_CLK_SEL); writel(m_clk_cfg, se->base + GENI_SER_M_CLK_CFG); and it seems like every protocol driver does some NIH things to take care of that.. perhaps this bit could be moved up to the common geni-se layer (Mukesh, are there some historical reasons for this being handled in proto drivers?) I think this may just be an effect of how the hardware is wired up - the ""DFS"" clocks that feed into the serial engines are partly set up in the clock controller driver, but then there's this bit: -- drivers/clk/qcom/clk-rcg2.c clk_rcg2_enable_dfs() /* * Rate changes with consumer writing a register in * their own I/O region */ init->flags |= CLK_GET_RATE_NOCACHE; init->ops = &clk_rcg2_dfs_ops; which is the writes i mentioned above. At a glance, plumbing this into OPP would require making GENI SEs self-consumed clock providers, which sounds no less messy Konrad