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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id v10-20020a1709063bca00b006ffa19b7782sm4831735ejf.74.2022.06.27.03.47.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 27 Jun 2022 03:47:18 -0700 (PDT) Message-ID: Date: Mon, 27 Jun 2022 12:47:17 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: pci-exynos.c phy_init() usage Content-Language: en-US To: Marek Szyprowski , Bjorn Helgaas , Jaehoon Chung , Jingoo Han Cc: =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Alim Akhtar , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org References: <20220624173541.GA1543581@bhelgaas> <591f696f-b55c-d267-7fcb-74f7fd4a6900@samsung.com> From: Krzysztof Kozlowski In-Reply-To: <591f696f-b55c-d267-7fcb-74f7fd4a6900@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220627_034723_113529_0615F79F X-CRM114-Status: GOOD ( 17.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 27/06/2022 12:30, Marek Szyprowski wrote: > Hi, > > On 24.06.2022 20:07, Krzysztof Kozlowski wrote: >> On 24/06/2022 19:35, Bjorn Helgaas wrote: >>> In exynos_pcie_host_init() [1], we call: >>> >>> phy_reset(ep->phy); >>> phy_power_on(ep->phy); >>> phy_init(ep->phy); >>> >>> The phy_init() function comment [2] says it must be called before >>> phy_power_on(). Is exynos doing this backwards? >> Looks like. I don't have Exynos hardware with a PCI, so cannot >> test/fix/verify. >> >> Luckily for Exynos ;-) it's not alone in this pattern: >> drivers/net/ethernet/marvell/sky2.c >> drivers/usb/dwc2/platform.c > > I've checked that on the real hardware. Swapping the order of > phy_power_on and phy_init breaks driver operation. > > However pci-exynos is the only driver that uses the phy-exynos-pcie, so > we can simply swap the content of the init and power_on in the phy > driver to adjust the code to the right order. power_on/init and > exit/power_off are also called one after the other in pci-exynos, > without any activity between them, so we can also simply move all > operation to one pair of the callback, like power_on/off. > > Krzysztof, which solution would you prefer? I think the real problem is that the Exynos PCIe phy init (exynos5433_pcie_phy_init) performs parts of power on procedure, so the code is mixed. Probably also the phy init could not happen earlier due to gated clocks (ungated in exynos5433_pcie_phy_power_on). I would prefer to clean it up while ordering init+power_on, so figure out more or less correct procedure. You can also look at Artpec-8 PHY - it seems using correct order (init+reset): https://lore.kernel.org/all/20220614011616epcms2p7dcaa67c53b7df5802dd7a697e2d472d7@epcms2p7/ Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel