Re: [PATCH 1/2] pmdomain/rockchip: skip QoS operations for idle-only domains

Shawn Lin
2026-04-01T02:59:36Z

在 2026/04/01 星期三 10:34, Daniel Bozeman 写道:
> The NanoPi Zero2 (RK3528) kernel panics during boot when a
> GPIO-controlled USB VBUS regulator is defined on GPIO4 (which
> is in PD_RKVENC). The goal of this series is to make USB host
> power work on boards that use GPIO4 for regulator control.
>
> The root cause is a probe ordering issue. On RK3528, the power
> domain controller's first probe attempt fails because PD_GPU's
> clock lookup returns -EPROBE_DEFER (CRU hasn't probed yet).
> The driver then tears down all domains, including PD_RKVENC
> which would have registered successfully (it has no clock
> requirements). During this window, the USB regulator driver
> probes and requests GPIO4, which is in the now-unregistered
> PD_RKVENC. This triggers a synchronous external abort.
>
> With patch 2 alone (skipping deferred domains), the idle-only
> domains register successfully. But the genpd framework then
> attempts to power them off via genpd_power_off_work_fn. This
> calls rockchip_pd_power(), which does QoS save and idle
> requests on domains with pwr_mask == 0 that cannot actually
> be powered off.
>
> To your question about why QoS registers become inaccessible
> on idle-only domains: I have not root-caused that specifically.
> What I can confirm is the crash trace below, which occurs when
> patch 2 is applied without patch 1. The abort happens during

This sounds like a parent-child dependency which hasn't been sorted
out. My another question will be: with patch 1 applied, how to save-
restore qos registers during normal S2R usage?

> rockchip_pmu_set_idle_request on an idle-only domain:
>
>   Internal error: synchronous external abort: 0000000096000010
>   CPU: 2 PID: 60 Comm: kworker/2:3
>   Workqueue: pm genpd_power_off_work_fn
>   pc : regmap_mmio_read32le+0x8/0x20
>   lr : regmap_mmio_read+0x44/0x70
>   Call trace:
>    regmap_mmio_read32le+0x8/0x20
>    _regmap_bus_reg_read+0x6c/0xac
>    _regmap_read+0x60/0xd8
>    regmap_read+0x4c/0x7c
>    rockchip_pmu_set_idle_request.isra.0+0x94/0x1b4
>    rockchip_pd_power+0x37c/0x608
>    rockchip_pd_power_off+0x14/0x38
>    genpd_power_off.isra.0+0x1f0/0x2f0
>    genpd_power_off_work_fn+0x34/0x54
>
> The two patches work together: patch 1 prevents QoS access
> on idle-only domains, and patch 2 prevents the full probe
> teardown when a single domain defers.
>
> Tested on NanoPi Zero2 (fixes panic) and Radxa E20C (no
> regression).
>
> On Tue, Mar 31, 2026 at 6:17 PM Shawn Lin <shawn.lin@rock-chips.com
> <mailto:shawn.lin@rock-chips.com>> wrote:
>
> Hi Daniel,
>
> 在 2026/04/01 星期三 2:02, Daniel Bozeman 写道:
> > Idle-only power domains (pwr_mask == 0) cannot actually be powered
> > on or off. rockchip_do_pmu_set_power_domain() already returns early
> > for these domains, but rockchip_pd_power() still attempts QoS save
> > and idle requests before reaching that check.
> >
> > On RK3528, the idle-only domains (PD_RKVENC, PD_VO, PD_VPU) have
> > QoS registers that may be inaccessible when the generic power domain
> > framework attempts to power them off, leading to synchronous external
> > aborts.
> >
>
> Is it the real abort happened on your RK3528 board? I am trying to
> understand the problem first. Even with idle-only powerdomain, the code
> also save the QoS registers before set idle to the powerdomain, so
> how the QoS registers become inaccessible?
>
> > Return early from rockchip_pd_power() when pwr_mask is zero, matching
> > the existing guard in rockchip_do_pmu_set_power_domain().
> >
> > Fixes: 1fe767a56c32 ("soc: rockchip: power-domain: allow domains
> only handling idle requests")
> > Signed-off-by: Daniel Bozeman <daniel@orb.net
> <mailto:daniel@orb.net>>
> > ---
> >   drivers/pmdomain/rockchip/pm-domains.c | 3 +++
> >   1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/pmdomain/rockchip/pm-domains.c
> b/drivers/pmdomain/rockchip/pm-domains.c
> > index 490bbb1d1d..2eecae092a 100644
> > --- a/drivers/pmdomain/rockchip/pm-domains.c
> > +++ b/drivers/pmdomain/rockchip/pm-domains.c
> > @@ -640,6 +640,9 @@ static int rockchip_pd_power(struct
> rockchip_pm_domain *pd, bool power_on)
> >       if (rockchip_pmu_domain_is_on(pd) == power_on)
> >               return 0;
> >
> > +     if (pd->info->pwr_mask == 0)
> > +             return 0;
> > +
> >       ret = clk_bulk_enable(pd->num_clks, pd->clks);
> >       if (ret < 0) {
> >               dev_err(pmu->dev, "failed to enable clocks\n");
> >
> > base-commit: bc330699801d3b4f99110365512caed5adcfaca3
>