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[89.27.92.210]) by smtp.gmail.com with ESMTPSA id v20-20020a056512349400b0047f6b4f82d1sm2387521lfr.250.2022.08.23.01.30.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 23 Aug 2022 01:30:24 -0700 (PDT) Message-ID: Date: Tue, 23 Aug 2022 11:30:22 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.12.0 Subject: Re: [PATCH 16/20] dt-bindings: memory: snps: Detach Zynq DDRC controller support Content-Language: en-US To: Serge Semin Cc: Serge Semin , Rob Herring , Michal Simek , Borislav Petkov , Mauro Carvalho Chehab , Tony Luck , Rob Herring , Manish Narani , Alexey Malahov , Michail Ivanov , Pavel Parkhomenko , Punnaiah Choudary Kalluri , Dinh Nguyen , James Morse , Robert Richter , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org References: <20220822190730.27277-1-Sergey.Semin@baikalelectronics.ru> <20220822190730.27277-17-Sergey.Semin@baikalelectronics.ru> <835938e3-e4f5-5029-9373-5dd59bc3b625@linaro.org> <20220823082748.td6pwkzj5grfno77@mobilestation> From: Krzysztof Kozlowski In-Reply-To: <20220823082748.td6pwkzj5grfno77@mobilestation> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220823_013026_759610_B133AD7E X-CRM114-Status: GOOD ( 18.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 23/08/2022 11:27, Serge Semin wrote: > On Tue, Aug 23, 2022 at 11:22:08AM +0300, Krzysztof Kozlowski wrote: >> On 23/08/2022 11:17, Krzysztof Kozlowski wrote: >>> On 22/08/2022 22:07, Serge Semin wrote: >>>> The Zynq A05 DDRC controller has nothing in common with DW uMCTL2 DDRC: >>>> the CSRs layout is absolutely different and it doesn't has IRQ unlike DW >>>> uMCTL2 DDR controller of all versions (v1.x, v2.x and v3.x). Thus there is >>>> no any reason to have these controllers described by the same bindings. >>>> Thus let's split them up. >>>> >>>> While at it rename the original Synopsys uMCTL2 DT-schema file to a more >>>> descriptive - snps,dw-umctl2-ddrc.yaml and add a more detailed title and >>>> description of the device bindings. >>> >>> Filename should be based on compatible, so if renaming then >>> snps,ddrc-3.80a.yaml or snps,ddrc.yaml... which leads to original >>> filename anyway. Therefore nack for rename. >>> >>> BTW, if you perform renames, generate patches with proper -M/-C/-B >>> arguments so this is detected. >>> >>> >>>> >>>> Signed-off-by: Serge Semin >>>> ---> .../snps,dw-umctl2-ddrc.yaml | 51 +++++++++++++ >>> >>> This is a mess. I did not get any cover letters, any other patches any >>> description of relation between this and your other one. >>> >>> It seems you make independent and conflicting changes to the same file, >>> so this has to be properly organized. >>> >>> Send entire patchset with cover letter with description of all >>> dependencies to all maintainers. >>> >>> This is unreviewable now, so a no. >> > >> And also untestable by Rob's bot, so will have to wait. > > For what reason it's untestable? The patch has no dependencies from > any other patchset. This one is testable, but the next one is not, because it depends on something. I don't see the reason to split the bindings between different patchsets. Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel