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Tue, 28 Jul 2020 07:20:07 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id B702EC433CA; Tue, 28 Jul 2020 07:20:06 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id D6338C433C9; Tue, 28 Jul 2020 07:20:05 +0000 (UTC) MIME-Version: 1.0 Date: Tue, 28 Jul 2020 12:50:05 +0530 From: Sai Prakash Ranjan To: Bjorn Andersson Subject: Re: [PATCH 2/4] arm64: dts: qcom: sc7180: Add iommus property to ETR In-Reply-To: <20200728062850.GC202429@builder.lan> References: <2312c9a10e7251d69e31e4f51c0f1d70e6f2f2f5.1591708204.git.saiprakash.ranjan@codeaurora.org> <20200621072213.GG128451@builder.lan> <20200727205834.GA202429@builder.lan> <207e6b6a297d5ce1bdcac204e297389b@codeaurora.org> <20200728062850.GC202429@builder.lan> Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200728_032021_506575_FF73E418 X-CRM114-Status: GOOD ( 31.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Jonathan Marek , Mathieu Poirier , Suzuki K Poulose , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Stephen Boyd , Andy Gross , linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-07-28 11:58, Bjorn Andersson wrote: > On Mon 27 Jul 21:40 PDT 2020, Sai Prakash Ranjan wrote: > >> On 2020-07-28 02:28, Bjorn Andersson wrote: >> > On Tue 23 Jun 23:56 PDT 2020, Sai Prakash Ranjan wrote: >> > >> > > Hi Bjorn, >> > > >> > > On 2020-06-21 13:39, Sai Prakash Ranjan wrote: >> > > > Hi Bjorn, >> > > > >> > > > On 2020-06-21 12:52, Bjorn Andersson wrote: >> > > > > On Tue 09 Jun 06:30 PDT 2020, Sai Prakash Ranjan wrote: >> > > > > >> > > > > > Define iommus property for Coresight ETR component in >> > > > > > SC7180 SoC with the SID and mask to enable SMMU >> > > > > > translation for this master. >> > > > > > >> > > > > >> > > > > We don't have &apps_smmu in linux-next, as we've yet to figure out how >> > > > > to disable the boot splash or support the stream mapping handover. >> > > > > >> > > > > So I'm not able to apply this. >> > > > > >> > > > >> > > > This is for SC7180 which has apps_smmu not SM8150. >> > > > >> > > >> > > Please let me know if this needs further explanation. >> > > >> > >> > I must have commented on the wrong patch, sorry about that. The SM8150 >> > patch in this series does not compile due to the lack of &apps_smmu. >> > >> > I've picked the other 3 patches. >> > >> >> Thanks Bjorn, I can resend SM8150 coresight change when SMMU support >> lands >> for it >> since coresight ETR won't work without it on android bootloaders. >> >> As for the other 3 patches, Patch 1 and Patch 2 will apply cleanly to >> the >> right coresight >> nodes but due to the missing unique context in Patch 3, it could be >> applied >> to some other node. >> We had to upload this change 3 times in chromium tree to get it >> applied to >> the right replicator node :) >> and this property in Patch 3 is important to fix a hard lockup. I'm >> not sure >> why this patch is missing >> the proper context :/ >> >> I couldn't find the changes yet in qcom/for-next or other branches to >> see if >> it is >> applied to right replicator node. In case you haven't applied it yet, >> Patch >> 3 change >> should be applied to "replicator@6b06000" node. >> > > Thanks for pointing that out, I've fixed up the incorrectly applied > change. (Still not published the branch) > > > For the future I believe you can pass -U to git format-patch to get > number of lines of context. Making that bigger than the default 3 > should help for the coresight patches. > Thanks Bjorn, will use this option going forward. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel