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[34.124.234.44]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-367d63e03f6sm7798313a91.12.2026.05.11.03.34.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 May 2026 03:34:15 -0700 (PDT) Date: Mon, 11 May 2026 10:34:09 +0000 From: Pranjal Shrivastava To: Jason Gunthorpe Cc: iommu@lists.linux.dev, Jonathan Hunter , Joerg Roedel , linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, Robin Murphy , Thierry Reding , Krishna Reddy , Will Deacon , David Matlack , Pasha Tatashin , patches@lists.linux.dev, Samiullah Khawaja , Mostafa Saleh Subject: Re: [PATCH 7/9] iommu/arm-smmu-v3: Directly encode CMDQ_OP_ATC_INV Message-ID: References: <0-v1-b7dc0a0d4aa0+3723d-smmu_no_cmdq_ent_jgg@nvidia.com> <7-v1-b7dc0a0d4aa0+3723d-smmu_no_cmdq_ent_jgg@nvidia.com> <20260509165401.GL9254@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260509165401.GL9254@nvidia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260511_033418_055827_99150A0C X-CRM114-Status: GOOD ( 20.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, May 09, 2026 at 01:54:01PM -0300, Jason Gunthorpe wrote: > On Fri, May 08, 2026 at 11:46:39AM +0000, Pranjal Shrivastava wrote: > > On Fri, May 01, 2026 at 11:29:16AM -0300, Jason Gunthorpe wrote: > > > Add a new command make function and convert all the places using > > > ATC_INV. > > > > > > Split out full invalidation to directly make the cmd instead of > > > overloading size=0 to mean full invalidation. > > > > > > Signed-off-by: Jason Gunthorpe > > > --- > > > > Nit: I guess it's worth mentioning that we remove CMDQ_ATC_0_GLOBAL as > > we don't set ent->atc.global = true anywhere in the driver anymore. > > I added this: > > In section "3.9.1 ATS Interface" of F.b the specification says: > > When the SMMU returns an ATS Translation Completion for a request that > had a PASID, the Global bit of the Translation Completion Data Entry > must be zero. > > Even though it faithfully forwards the G bit through to the ATS > invalidation command there is no way to create G mappings so there is > never any need to send a G invalidation. Thus don't expose global in the > new helpers and leave CMDQ_ATC_0_GLOBAL unused. Ack. Sounds good. Should also add that the only other place we might need G=1 is for a full ATC wipe. However, we don't since the PCIe Spec 10.3.8, mentions issuing an invalidation without a PASID prefix (SSV=0) already forces the device to invalidate all ATC entries for any PASID at all addresses, e.g. arm_smmu_atc_inv_master(master, IOMMU_NO_PASID). Although the comment in arm_smmu_enable_ats should suffice too. Thanks, Praan