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a="79512031" X-IronPort-AV: E=Sophos;i="6.23,230,1770624000"; d="scan'208";a="79512031" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2026 04:26:21 -0700 X-CSE-ConnectionGUID: ziLjYj4/QpSJWTTVZ++n9w== X-CSE-MsgGUID: FlPvWD+4QOuKYhoES0hRVQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,230,1770624000"; d="scan'208";a="237983683" Received: from kniemiec-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.245.112]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2026 04:26:13 -0700 Date: Tue, 12 May 2026 14:26:13 +0300 From: Andy Shevchenko To: Yu-Chun Lin Cc: linusw@kernel.org, brgl@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, afaerber@suse.com, wbg@kernel.org, mathieu.dubois-briand@bootlin.com, mwalle@kernel.org, lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, nuno.sa@analog.com, andy@kernel.org, dlechner@baylibre.com, tychang@realtek.com, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-realtek-soc@lists.infradead.org, linux-iio@vger.kernel.org, cy.huang@realtek.com, stanley_chang@realtek.com, james.tai@realtek.com, Linus Walleij Subject: Re: [PATCH v3 3/7] gpio: regmap: Add gpio_regmap_operation and write-enable support Message-ID: References: <20260512033317.1602537-1-eleanor.lin@realtek.com> <20260512033317.1602537-4-eleanor.lin@realtek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260512033317.1602537-4-eleanor.lin@realtek.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260512_042622_889200_B26D56B7 X-CRM114-Status: GOOD ( 16.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, May 12, 2026 at 11:33:13AM +0800, Yu-Chun Lin wrote: > Extend the reg_mask_xlate callback with an operation type parameter > (gpio_regmap_operation) to allow drivers to return different > register/mask combinations for different GPIO operations. > > Also add write-enable mechanism for hardware that requires setting a > write-enable bit before modifying GPIO control registers. > > Consequently, update all existing drivers utilizing the gpio-regmap > framework (across drivers/gpio, drivers/iio, and drivers/pinctrl) > to accommodate the new reg_mask_xlate function signature. Dunno if we want per-driver patches (in that case it will be a new name and callback, conversion per driver, removal old name, and, if required, renaming back). In any case looks reasonable change. ... > -static int idi_48_reg_mask_xlate(struct gpio_regmap *gpio, unsigned int base, > - unsigned int offset, unsigned int *reg, > - unsigned int *mask) > +static int idi_48_reg_mask_xlate(struct gpio_regmap *gpio, > + enum gpio_regmap_operation op, > + unsigned int base, unsigned int offset, > + unsigned int *reg, unsigned int *mask) In every case, use this logical split. ... > -static int i8255_reg_mask_xlate(struct gpio_regmap *gpio, unsigned int base, > - unsigned int offset, unsigned int *reg, > +static int i8255_reg_mask_xlate(struct gpio_regmap *gpio, enum gpio_regmap_operation op, > + unsigned int base, unsigned int offset, unsigned int *reg, > unsigned int *mask) Exempli gratia, this one looks illogical, harder to read. ... > + ret = gpio->reg_mask_xlate(gpio, GPIO_REGMAP_SET_DIR_WREN_OP, base, offset, ®, > + &wren_mask); Ditto. Easier to follow when ret = gpio->reg_mask_xlate(gpio, GPIO_REGMAP_SET_DIR_WREN_OP, base, offset, ®, &wren_mask); > if (ret) > return ret; ... > +/** > + * enum gpio_regmap_operation - Operation type for reg_mask_xlate callback > + * > + * This enum is used to distinguish between different types of GPIO operations > + * so that the reg_mask_xlate callback can return the appropriate mask for each > + * operation type. > + * > + * Value operations: Have you checked the rendered text (HTML, PDF)? I believe this will look awfully wrong. > + * @GPIO_REGMAP_GET_OP: Mask for reading direction to detect if GPIO is input or output. > + * Used in gpio_regmap_get() to determine the GPIO direction. > + * @GPIO_REGMAP_IN: Mask for reading input value. Used when GPIO is configured as input. > + * @GPIO_REGMAP_OUT: Mask for reading output value. Used when GPIO is configured as output. > + * > + * Output operations: > + * @GPIO_REGMAP_SET_OP: Mask for setting GPIO output value. > + * @GPIO_REGMAP_SET_WITH_CLEAR_OP: Mask for setting/clearing GPIO using separate registers. > + * @GPIO_REGMAP_SET_WREN_OP: Write-enable mask for output operations. May be used to enable > + * writes to protected registers. > + * > + * Direction operations: > + * @GPIO_REGMAP_GET_DIR_OP: Mask for reading GPIO direction (input/output). > + * @GPIO_REGMAP_SET_DIR_OP: Mask for setting GPIO direction (input/output). > + * @GPIO_REGMAP_SET_DIR_WREN_OP: Write-enable mask for direction operations. May be used to > + * enable writes to protected direction registers. > + */ -- With Best Regards, Andy Shevchenko