From: Yeoreum Yun <yeoreum.yun@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, mike.leach@arm.com,
james.clark@linaro.org, alexander.shishkin@linux.intel.com,
leo.yan@arm.com, jie.gan@oss.qualcomm.com
Subject: Re: [PATCH v7 02/13] coresight: etm4x: fix underflow for nrseqstate
Date: Mon, 1 Jun 2026 11:15:28 +0100 [thread overview]
Message-ID: <ah1bwOSCMrwfrRwD@e129823.arm.com> (raw)
In-Reply-To: <0974242f-6102-49ec-b87b-763931eb9aef@arm.com>
> On 01/06/2026 11:08, Yeoreum Yun wrote:
> > > On 19/05/2026 16:48, Yeoreum Yun wrote:
> > > > TCRSEQEVR<n> is implemented only when TCRIDR5.NUMSEQSTATE is 0b100,
> > > > in which case n ranges from 0 to 2; otherwise, TCRIDR5.NUMSEQSTATE is 0b000.
> > > >
> > > > Therefore, drvdata->nrseqstate should be checked before entering the loop.
> > >
> > > for (i = 0; i < drvdata->nrseqstate - 1; i++)
> > >
> > > Wouldn't that check cover the case ? (provided i is signed int ?)
> > >
> > > Suzuki
> >
> > Unfortunately, the drvdata->nrseqstate is u8 but i is signed int.
> > I think in this case it would iterate 255 times (0xff).
>
> Then why not fix it to signed ? Anyways, please see my other comment. We
> shouldn't be relying on nrseqstate for the number of seq_ctrl registers.
Yeap. I confirmed that. I think it's enough with the nr_seq_ctrl.
Thanks!
>
> >
> > >
> > > >
> > > > Link: https://developer.arm.com/documentation/ihi0064/latest/ [0]
> > > > Fixes: 2e1cdfe184b5 ("coresight-etm4x: Adding CoreSight ETM4x driver")
> > > > Reviewed-by: Leo Yan <leo.yan@arm.com>
> > > > Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
> > > > ---
> > > > .../hwtracing/coresight/coresight-etm4x-core.c | 18 ++++++++++--------
> > > > .../coresight/coresight-etm4x-sysfs.c | 2 ++
> > > > 2 files changed, 12 insertions(+), 8 deletions(-)
> > > >
> > > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> > > > index 1e3b0344dc00..94b9385e964a 100644
> > > > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> > > > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> > > > @@ -542,9 +542,11 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
> > > > etm4x_relaxed_write32(csa, config->vissctlr, TRCVISSCTLR);
> > > > if (drvdata->nr_pe_cmp)
> > > > etm4x_relaxed_write32(csa, config->vipcssctlr, TRCVIPCSSCTLR);
> > > > - for (i = 0; i < drvdata->nrseqstate - 1; i++)
> > > > - etm4x_relaxed_write32(csa, config->seq_ctrl[i], TRCSEQEVRn(i));
> > > > +
> > > > if (drvdata->nrseqstate) {
> > > > + for (i = 0; i < drvdata->nrseqstate - 1; i++)
> > > > + etm4x_relaxed_write32(csa, config->seq_ctrl[i], TRCSEQEVRn(i));
> > > > +
> > > > etm4x_relaxed_write32(csa, config->seq_rst, TRCSEQRSTEVR);
> > > > etm4x_relaxed_write32(csa, config->seq_state, TRCSEQSTR);
> > > > }
> > > > @@ -1896,10 +1898,10 @@ static int etm4_cpu_save(struct coresight_device *csdev)
> > > > if (drvdata->nr_pe_cmp)
> > > > state->trcvipcssctlr = etm4x_read32(csa, TRCVIPCSSCTLR);
> > > > - for (i = 0; i < drvdata->nrseqstate - 1; i++)
> > > > - state->trcseqevr[i] = etm4x_read32(csa, TRCSEQEVRn(i));
> > > > -
> > > > if (drvdata->nrseqstate) {
> > > > + for (i = 0; i < drvdata->nrseqstate - 1; i++)
> > > > + state->trcseqevr[i] = etm4x_read32(csa, TRCSEQEVRn(i));
> > > > +
> > > > state->trcseqrstevr = etm4x_read32(csa, TRCSEQRSTEVR);
> > > > state->trcseqstr = etm4x_read32(csa, TRCSEQSTR);
> > > > }
> > > > @@ -2009,10 +2011,10 @@ static void etm4_cpu_restore(struct coresight_device *csdev)
> > > > if (drvdata->nr_pe_cmp)
> > > > etm4x_relaxed_write32(csa, state->trcvipcssctlr, TRCVIPCSSCTLR);
> > > > - for (i = 0; i < drvdata->nrseqstate - 1; i++)
> > > > - etm4x_relaxed_write32(csa, state->trcseqevr[i], TRCSEQEVRn(i));
> > > > -
> > > > if (drvdata->nrseqstate) {
> > > > + for (i = 0; i < drvdata->nrseqstate - 1; i++)
> > > > + etm4x_relaxed_write32(csa, state->trcseqevr[i], TRCSEQEVRn(i));
> > > > +
> > > > etm4x_relaxed_write32(csa, state->trcseqrstevr, TRCSEQRSTEVR);
> > > > etm4x_relaxed_write32(csa, state->trcseqstr, TRCSEQSTR);
> > > > }
> > > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> > > > index e9eeea6240d5..0e1ad175aa1e 100644
> > > > --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> > > > +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> > > > @@ -1395,6 +1395,8 @@ static ssize_t seq_idx_store(struct device *dev,
> > > > struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
> > > > struct etmv4_config *config = &drvdata->config;
> > > > + if (!drvdata->nrseqstate)
> > > > + return -ENOTSUPP;
> > > > if (kstrtoul(buf, 16, &val))
> > > > return -EINVAL;
> > > > if (val >= drvdata->nrseqstate - 1)
> > >
> >
>
--
Sincerely,
Yeoreum Yun
next prev parent reply other threads:[~2026-06-01 10:15 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-19 15:47 [PATCH v7 00/13] fix several inconsistencies with sysfs configuration in etmX Yeoreum Yun
2026-05-19 15:48 ` [PATCH v7 01/13] coresight: etm4x: fix wrong check of etm4x_sspcicrn_present() Yeoreum Yun
2026-05-19 15:48 ` [PATCH v7 02/13] coresight: etm4x: fix underflow for nrseqstate Yeoreum Yun
2026-06-01 9:40 ` Suzuki K Poulose
2026-06-01 10:08 ` Yeoreum Yun
2026-06-01 10:13 ` Suzuki K Poulose
2026-06-01 10:15 ` Yeoreum Yun [this message]
2026-06-01 9:52 ` Suzuki K Poulose
2026-06-01 10:12 ` Yeoreum Yun
2026-05-19 15:48 ` [PATCH v7 03/13] coresight: etm4x: introduce ETM_MAX_SEQ_TRANSITIONS Yeoreum Yun
2026-05-28 12:58 ` Leo Yan
2026-05-28 13:47 ` Yeoreum Yun
2026-06-01 9:53 ` Suzuki K Poulose
2026-06-01 11:14 ` Yeoreum Yun
2026-05-19 15:48 ` [PATCH v7 04/13] coresight: etm4x: introduce struct etm4_caps Yeoreum Yun
2026-05-19 15:48 ` [PATCH v7 05/13] coresight: etm4x: exclude ss_status from drvdata->config Yeoreum Yun
2026-05-28 13:30 ` Leo Yan
2026-05-28 13:46 ` Yeoreum Yun
2026-06-01 11:27 ` Suzuki K Poulose
2026-06-01 11:52 ` Yeoreum Yun
2026-05-19 15:48 ` [PATCH v7 06/13] coresight: etm4x: remove redundant fields in etmv4_save_state Yeoreum Yun
2026-05-19 15:48 ` [PATCH v7 07/13] coresight: etm4x: fix leaked trace id Yeoreum Yun
2026-05-19 15:48 ` [PATCH v7 08/13] coresight: etm4x: fix inconsistencies with sysfs configuration Yeoreum Yun
2026-05-28 14:09 ` Leo Yan
2026-05-28 14:26 ` Yeoreum Yun
2026-05-28 14:56 ` Leo Yan
2026-05-28 15:22 ` Yeoreum Yun
2026-06-01 15:38 ` Suzuki K Poulose
2026-05-19 15:48 ` [PATCH v7 09/13] coresight: etm4x: missing cscfg_csdev_disable_active_config() in perf enable Yeoreum Yun
2026-05-28 14:33 ` Leo Yan
2026-05-28 14:43 ` Yeoreum Yun
2026-05-28 15:26 ` Leo Yan
2026-05-28 16:01 ` Yeoreum Yun
2026-06-01 16:11 ` Suzuki K Poulose
2026-06-01 16:41 ` Yeoreum Yun
2026-05-19 15:48 ` [PATCH v7 10/13] coresight: etm3x: change drvdata->spinlock type to raw_spin_lock_t Yeoreum Yun
2026-05-19 15:48 ` [PATCH v7 11/13] coresight: etm3x: introduce struct etm_caps Yeoreum Yun
2026-05-19 15:48 ` [PATCH v7 12/13] coresight: etm3x: fix inconsistencies with sysfs configuration Yeoreum Yun
2026-05-19 15:48 ` [PATCH v7 13/13] coresight: etm3x: remove redundant cpu online check on etm_enable_sysfs() Yeoreum Yun
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ah1bwOSCMrwfrRwD@e129823.arm.com \
--to=yeoreum.yun@arm.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=coresight@lists.linaro.org \
--cc=james.clark@linaro.org \
--cc=jie.gan@oss.qualcomm.com \
--cc=leo.yan@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mike.leach@arm.com \
--cc=suzuki.poulose@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox