From: Pranjal Shrivastava <praan@google.com>
To: Vasant Hegde <vasant.hegde@amd.com>
Cc: Ankit Soni <Ankit.Soni@amd.com>,
iommu@lists.linux.dev, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Joerg Roedel <joro@8bytes.org>,
Will Deacon <will@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
David Woodhouse <dwmw2@infradead.org>,
Lu Baolu <baolu.lu@linux.intel.com>,
Robin Murphy <robin.murphy@arm.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Jason Gunthorpe <jgg@ziepe.ca>,
Nicolin Chen <nicolinc@nvidia.com>,
David Matlack <dmatlack@google.com>,
Samiullah Khawaja <skhawaja@google.com>,
Daniel Mentz <danielmentz@google.com>,
Pasha Tatashin <pasha.tatashin@soleen.com>,
Mostafa Saleh <smostafa@google.com>
Subject: Re: [PATCH v6 6/6] iommu/amd: Fail probe on ATS configuration failure
Date: Mon, 1 Jun 2026 10:41:14 +0000 [thread overview]
Message-ID: <ah1hyp0oB5iJenQt@google.com> (raw)
In-Reply-To: <6086ebd5-4538-4b85-bbd3-84df9c6198d2@amd.com>
On Mon, Jun 01, 2026 at 02:58:11PM +0530, Vasant Hegde wrote:
> Hi Pranjal,
>
> On 6/1/2026 11:50 AM, Pranjal Shrivastava wrote:
> > On Mon, Jun 01, 2026 at 06:00:15AM +0000, Ankit Soni wrote:
> >
[...]
> > Hi Ankit,
> >
> > Ack. Sashiko made me realize that this regresses IRQ mapping for AMD,
> > and I agree that the call to iommu_ignore_device() is a bit too
> > aggressive as it wipes the rlookup_table entry required for IRQ
> > remapping, particularly in PD_MODE_NONE.
> >
> > I was thinkig to address this in the next version as follows:
> >
> > 1. Split the probe error paths:
> > - Proper init failures (like iommu_init_device) will continue to call
> > iommu_ignore_device(). I will fix the double invocation here.
> >
> > - Config failures (like ATS mismatch or PD_MODE_NONE) will return an
> > an error but skip caling iommu_ignore_device(), preserving the
> > rlookup_table entry for IRQ remapping.
>
> I was reviewing v5 last Friday and decided to fix probe() code as its been long
> time I wanted to cleanup this code. I have a patch series which pretty much
> does this.
>
> I haven't fixed iommu_ignore_device() code, but should be simple to fix it.
> we can use amd_iommu_make_clear_dte / amd_iommu_update_dte. It will set the
> dte.tv=0 and essentially blocks all DMAs.
>
> If you already have the patches then please go ahead, else I can post the series
> this week.
Hi Vasant,
I have drafted the fixes (including the alias clearing order and the
atomic DTE updates for iommu_ignore_device),
I'll go ahead and post them as a separate preparatory series soon.
I'm also happy to incorporate any of your existing patches if you'd
like?
>
>
> >
> > 2. Resolve the Use-After-Free (UAF):
> > To prevent the UAF on the "DMA-only" failure path, I will ensure that
> > the hardware Device Table Entry (DTE) is set to a safe state (like
> > blocked or bypass) and the dev_data->dev pointer is cleared, as the
> > IOMMU core does not invoke release_device() after a probe failure.
> >
> > 3. Fix iommu_ignore_device() infrastructure:
> > I will address the pre-existing bugs identified by Sashiko:
> > - Fix clearing order (calling setup_aliases before clearing the
> > rlookup_table).
> > - Replace the non-atomic memset() on the hardware dev_table with an
> > atomic DTE update.
> >
> > That said, I'm investigating the safest way to revert the MSI domain
> > assignment on probe failure to avoid the dangling domain issue pointed
> > out by Sashiko. Maybe we can add an amd_iommu_restore_msi_domain() helper
> > to revert the assignment made in amd_iommu_set_pci_msi_domain() on probe
> > failure?
> >
> > Please, let me know if that sounds okay?
> >
> > Also, I'm wondering if I should send this as a separate series specific
> > to AMD which is unrelated to this one? Or maybe handle AMD IOMMU in a
> > separate series altogether. Let me know if you (and Vasanth / Suravee)
> > would prefer that?
>
> Lets separate out AMD fixes part as its not related to this series.
>
> If you want to keep this patch then just the "iommu_ignore_device" part that
> should be OK -OR- if you want to drop entirely and pick it up with AMD specific
> series that's also works for me.
Ack. I guess a separate series to handle AMD IOMMU sounds better. I'll
post one soon.
Thanks,
Praan
prev parent reply other threads:[~2026-06-01 10:41 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-29 11:12 [PATCH v6 0/6] iommu: Standardize ATS robustness and state tracking Pranjal Shrivastava
2026-05-29 11:12 ` [PATCH v6 1/6] PCI/ATS: Ensure pci_ats_supported() is PF-aware for VFs Pranjal Shrivastava
2026-05-29 11:12 ` [PATCH v6 2/6] PCI/ATS: Validate STU for VFs in pci_prepare_ats() Pranjal Shrivastava
2026-05-29 11:12 ` [PATCH v6 3/6] PCI/ATS: Mandate checking pci_ats_supported() before pci_prepare_ats() Pranjal Shrivastava
2026-05-29 21:56 ` Nicolin Chen
2026-05-31 17:06 ` Pranjal Shrivastava
2026-05-29 11:12 ` [PATCH v6 4/6] iommu/arm-smmu-v3: Standardize ATS enablement failure reporting Pranjal Shrivastava
2026-05-29 21:51 ` Nicolin Chen
2026-05-31 17:13 ` Pranjal Shrivastava
2026-05-29 11:12 ` [PATCH v6 5/6] iommu/vt-d: Fail probe on ATS configuration failure Pranjal Shrivastava
2026-05-29 11:12 ` [PATCH v6 6/6] iommu/amd: " Pranjal Shrivastava
2026-06-01 6:00 ` Ankit Soni
2026-06-01 6:20 ` Pranjal Shrivastava
2026-06-01 8:17 ` Ankit Soni
2026-06-01 10:35 ` Pranjal Shrivastava
2026-06-01 9:28 ` Vasant Hegde
2026-06-01 10:41 ` Pranjal Shrivastava [this message]
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