From: Lorenzo Pieralisi <lpieralisi@kernel.org>
To: Sunil V L <sunilvl@oss.qualcomm.com>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>, Sunil V L <sunilvl@ventanamicro.com>,
Marc Zyngier <maz@kernel.org>, Thomas Gleixner <tglx@kernel.org>,
Huacai Chen <chenhuacai@kernel.org>,
Anup Patel <anup@brainfault.org>,
Hanjun Guo <guohanjun@huawei.com>,
Sudeep Holla <sudeep.holla@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
loongarch@lists.linux.dev
Subject: Re: [PATCH v2 1/6] ACPI: RISC-V: Fix riscv_acpi_irq_get_dep() loop termination
Date: Tue, 9 Jun 2026 11:19:00 +0200 [thread overview]
Message-ID: <aifahCtdj8GpHN/v@lpieralisi> (raw)
In-Reply-To: <CAB19ukFFwm3ehzkBFr+oXRjA7VK_4_=XHFSuqdEpbVqUz8Do4Q@mail.gmail.com>
On Mon, Jun 08, 2026 at 09:54:28PM +0530, Sunil V L wrote:
> Hi Lorenzo,
>
> On Wed, Jun 3, 2026 at 1:51 PM Lorenzo Pieralisi <lpieralisi@kernel.org> wrote:
> >
> > In riscv_acpi_add_irq_dep() the main loop condition would currently stop
> > the loop if an interrupt descriptor contains an interrupt for which the
> > respective GSI handle is NULL, which is not correct because subsequent
> > interrupts in the interrupt descriptor might still have a GSI dependency
> > that must not be skipped.
> >
> > Rework riscv_acpi_add_irq_dep() and the riscv_acpi_irq_get_dep() call chain
> > to fix it - by not forcing the loop to stop in order to guarantee
> > dependency detection for all the interrupt entries in the CRS descriptor.
> >
> > Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
> > Cc: "Rafael J. Wysocki" <rafael@kernel.org>
> > Cc: Sunil V L <sunilvl@ventanamicro.com>
> > ---
> > drivers/acpi/riscv/irq.c | 10 ++++++----
> > 1 file changed, 6 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/acpi/riscv/irq.c b/drivers/acpi/riscv/irq.c
> > index 9b88d0993e88..cd83c3035cf6 100644
> > --- a/drivers/acpi/riscv/irq.c
> > +++ b/drivers/acpi/riscv/irq.c
> > @@ -299,6 +299,7 @@ static acpi_status riscv_acpi_irq_get_parent(struct acpi_resource *ares, void *c
> > return AE_OK;
> >
> > ctx->handle = riscv_acpi_get_gsi_handle(eirq->interrupts[ctx->index]);
> > + ctx->rc = 0;
> > return AE_CTRL_TERMINATE;
> > }
> >
> > @@ -314,10 +315,8 @@ static int riscv_acpi_irq_get_dep(acpi_handle handle, unsigned int index, acpi_h
> >
> > acpi_walk_resources(handle, METHOD_NAME__CRS, riscv_acpi_irq_get_parent, &ctx);
> > *gsi_handle = ctx.handle;
> > - if (*gsi_handle)
> > - return 1;
> >
> > - return 0;
> > + return ctx.rc;
> > }
> >
> > static u32 riscv_acpi_add_prt_dep(acpi_handle handle)
> > @@ -381,8 +380,11 @@ static u32 riscv_acpi_add_irq_dep(acpi_handle handle)
> > int i;
> >
> > for (i = 0;
> > - riscv_acpi_irq_get_dep(handle, i, &gsi_handle);
> > + !riscv_acpi_irq_get_dep(handle, i, &gsi_handle);
> > i++) {
> > + if (!gsi_handle)
> > + continue;
> > +
> > dep_devices.count = 1;
> > dep_devices.handles = kzalloc_objs(*dep_devices.handles, 1);
> > if (!dep_devices.handles) {
> >
> Do these fixes need the Fixes tag?
I can add a Fixes: tag but I wanted first some help testing them, it
is code perusal that got me there.
> Otherwise, LGTM.
> Reviewed-by: Sunil V L <sunilvl@oss.qualcomm.com>
Thanks,
Lorenzo
next prev parent reply other threads:[~2026-06-09 9:19 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-03 8:20 [PATCH v2 0/6] irqchip/ACPI: Arm GICv5 IWB ACPI IRQ probe deferral Lorenzo Pieralisi
2026-06-03 8:20 ` [PATCH v2 1/6] ACPI: RISC-V: Fix riscv_acpi_irq_get_dep() loop termination Lorenzo Pieralisi
2026-06-08 16:24 ` Sunil V L
2026-06-09 9:19 ` Lorenzo Pieralisi [this message]
2026-06-09 14:45 ` Sunil V L
2026-06-03 8:20 ` [PATCH v2 2/6] ACPI: RISC-V: Check acpi_get_handle() status in riscv_acpi_add_prt_dep() Lorenzo Pieralisi
2026-06-08 16:31 ` Sunil V L
2026-06-03 8:20 ` [PATCH v2 3/6] ACPI: RISC-V: Fix riscv_acpi_add_prt_dep() loop handling Lorenzo Pieralisi
2026-06-08 16:30 ` Sunil V L
2026-06-03 8:21 ` [PATCH v2 4/6] ACPI: irq: Move RISC-V interrupt controllers autodep to ACPI IRQ code Lorenzo Pieralisi
2026-06-08 16:38 ` Sunil V L
2026-06-03 8:21 ` [PATCH v2 5/6] ACPI/IORT: Implement ACPI infrastructure to enable GICv5 IWB probe deferral Lorenzo Pieralisi
2026-06-08 12:50 ` Rafael J. Wysocki
2026-06-03 8:21 ` [PATCH v2 6/6] irqchip/gic-v5: Enable GICv5 IWB ACPI probe ordering detection Lorenzo Pieralisi
2026-06-08 17:18 ` Rafael J. Wysocki
2026-06-09 9:31 ` Lorenzo Pieralisi
2026-06-12 7:46 ` Lorenzo Pieralisi
2026-06-30 10:51 ` Lorenzo Pieralisi
2026-06-30 10:55 ` Rafael J. Wysocki (Intel)
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