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From: Vinod Koul <vkoul@kernel.org>
To: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Cc: "Neil Armstrong" <neil.armstrong@linaro.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Algea Cao" <algea.cao@rock-chips.com>,
	"Dmitry Baryshkov" <lumag@kernel.org>,
	kernel@collabora.com, linux-phy@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	"Thomas Niederprüm" <dubito@online.de>,
	"Simon Wright" <simon@symple.nz>
Subject: Re: [PATCH v2 0/6] phy: rockchip: samsung-hdptx: Clock fixes and API transition cleanups
Date: Thu, 11 Jun 2026 16:56:23 +0530	[thread overview]
Message-ID: <aiqbX8kon8HtiSEl@vaman> (raw)
In-Reply-To: <ebcad67e-e14a-4d0e-b3e0-79ae1d146eaf@collabora.com>

On 03-06-26, 13:27, Cristian Ciocaltea wrote:
> On 5/20/26 10:05 PM, Cristian Ciocaltea wrote:
> > Hi Vinod,
> > 
> > On 5/11/26 9:21 PM, Cristian Ciocaltea wrote:
> >> This series provides a set of bug fixes and cleanups for the Rockchip
> >> Samsung HDPTX PHY driver.
> >>
> >> The first part of the series (i.e. PATCH 1 & 2) addresses clock rate
> >> calculation and synchronization issues.  Specifically, it fixes edge
> >> cases where the PHY PLL is pre-programmed by an external component (like
> >> a bootloader) or when changing the color depth (bpc) while keeping the
> >> modeline constant.  Because the Common Clock Framework .set_rate()
> >> callback might not be invoked if the pixel clock remains unchanged, this
> >> previously led to out-of-sync states between CCF and the actual HDMI PHY
> >> configuration.
> >>
> >> The second part focuses on code cleanups and modernizing the register
> >> access.  Now that dw_hdmi_qp driver has fully switched to using
> >> phy_configure(), we can drop the deprecated TMDS rate setup workarounds
> >> and the restrict_rate_change flag logic.  Finally, it refactors the
> >> driver to consistently use standard bitfield macros.
> >>
> >> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> >> ---
> >> Changes in v2:
> >> - Collected Tested-by tags from Thomas and Simon
> >> - Fixed a typo in commit description of patch 1
> >> - Added a comment in patch 2 explaining why PLL config errors are
> >>   ignored for rk_hdptx_phy_consumer_get()
> >> - Added a missed FIELD_GET conversion for lcpll_hw.pms_sdiv in patch 6
> >> - Rebased onto latest phy/fixes
> >> - Link to v1: https://lore.kernel.org/r/20260227-hdptx-clk-fixes-v1-0-f998f2762d0f@collabora.com
> > 
> > In case you missed my comments from last week on the Sashiko AI review findings
> > - in short, I don't think there is anything to worry about and the series should
> > be fine to apply as-is.  Please let me know if you would still prefer a new
> > revision.
> Kind reminder..

Please post a new revision based on phy/next

Thanks
-- 
~Vinod


  reply	other threads:[~2026-06-11 11:26 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-11 18:21 [PATCH v2 0/6] phy: rockchip: samsung-hdptx: Clock fixes and API transition cleanups Cristian Ciocaltea
2026-05-11 18:21 ` [PATCH v2 1/6] phy: rockchip: samsung-hdptx: Fix rate recalculation for high bpc Cristian Ciocaltea
2026-05-11 18:21 ` [PATCH v2 2/6] phy: rockchip: samsung-hdptx: Handle uncommitted PHY config changes Cristian Ciocaltea
2026-05-11 18:21 ` [PATCH v2 3/6] phy: rockchip: samsung-hdptx: Drop TMDS rate setup workaround Cristian Ciocaltea
2026-05-11 18:21 ` [PATCH v2 4/6] phy: rockchip: samsung-hdptx: Drop restrict_rate_change handling Cristian Ciocaltea
2026-05-11 18:21 ` [PATCH v2 5/6] phy: rockchip: samsung-hdptx: Simplify GRF access with FIELD_PREP_WM16() Cristian Ciocaltea
2026-05-11 18:21 ` [PATCH v2 6/6] phy: rockchip: samsung-hdptx: Consistently use bitfield macros Cristian Ciocaltea
2026-05-20 19:05 ` [PATCH v2 0/6] phy: rockchip: samsung-hdptx: Clock fixes and API transition cleanups Cristian Ciocaltea
2026-06-03 10:27   ` Cristian Ciocaltea
2026-06-11 11:26     ` Vinod Koul [this message]
2026-06-11 12:34       ` Cristian Ciocaltea

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