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Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1whmh9-000000025tZ-1y0s; Thu, 09 Jul 2026 11:13:31 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1whmh5-000000025sL-3aZO for linux-arm-kernel@lists.infradead.org; Thu, 09 Jul 2026 11:13:29 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 25E443570; Thu, 9 Jul 2026 04:13:22 -0700 (PDT) Received: from arm.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E40B83FE53; Thu, 9 Jul 2026 04:13:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1783595606; bh=SAV3PQ7+eCtje2uVxH/LefEDAxakMvTJxqH9sWGHNjU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=dqr2VgVo4J5uM+joPiCCMcuMryXYkHoDl8Yseh7vn5qnsw8KiVm31/w5zxn+qHZz6 FQ+PFakz3CMKt8/wA88yoTOV9CvFtW55mtYdapJsL6VEivjrkA7AVCtB4s+WoNPG6B FEJ4cXCyQS9OxIYWx7h63mAscI4uPmXdfA6VwK+M= Date: Thu, 9 Jul 2026 12:13:19 +0100 From: Catalin Marinas To: "Aneesh Kumar K.V" Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, Robin Murphy , Marek Szyprowski , Will Deacon , Marc Zyngier , Steven Price , Suzuki K Poulose , Jiri Pirko , Jason Gunthorpe , Mostafa Saleh , Petr Tesarik , Alexey Kardashevskiy , Dan Williams , Xu Yilun , linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Alexander Gordeev , Gerald Schaefer , Heiko Carstens , Vasily Gorbik , Christian Borntraeger , Sven Schnelle , x86@kernel.org, Jiri Pirko , Michael Kelley Subject: Re: [PATCH v7 16/22] dma-direct: make dma_direct_map_phys() honor DMA_ATTR_CC_SHARED Message-ID: References: <20260701054926.825925-1-aneesh.kumar@kernel.org> <20260701054926.825925-17-aneesh.kumar@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260709_041327_991258_5D4F75AC X-CRM114-Status: GOOD ( 24.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jul 08, 2026 at 11:28:14PM +0530, Aneesh Kumar K.V wrote: > Catalin Marinas writes: > > > On Wed, Jul 01, 2026 at 11:19:20AM +0530, Aneesh Kumar K.V (Arm) wrote: > >> diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c > >> index 97987f850a33..acf67c7064db 100644 > >> --- a/arch/arm64/mm/init.c > >> +++ b/arch/arm64/mm/init.c > >> @@ -338,10 +338,8 @@ void __init arch_mm_preinit(void) > >> unsigned int flags = SWIOTLB_VERBOSE; > >> bool swiotlb = max_pfn > PFN_DOWN(arm64_dma_phys_limit); > >> > >> - if (is_realm_world()) { > >> + if (is_realm_world()) > >> swiotlb = true; > >> - flags |= SWIOTLB_FORCE; > >> - } > > > > For this part: > > > > Reviewed-by: Catalin Marinas > > > >> diff --git a/kernel/dma/direct.h b/kernel/dma/direct.h > >> index e05dc7649366..f3fc28f352ba 100644 > >> --- a/kernel/dma/direct.h > >> +++ b/kernel/dma/direct.h > >> @@ -88,37 +88,40 @@ static inline dma_addr_t dma_direct_map_phys(struct device *dev, > >> { > >> dma_addr_t dma_addr; > >> > >> + /* > >> + * For a device requiring unencrypted DMA, MMIO memory is treated > >> + * as shared by default. > >> + */ > >> + if (force_dma_unencrypted(dev) && (attrs & DMA_ATTR_MMIO)) > >> + attrs |= DMA_ATTR_CC_SHARED; > >> + > >> if (is_swiotlb_force_bounce(dev)) { > >> - if (!(attrs & DMA_ATTR_CC_SHARED)) { > >> - if (attrs & (DMA_ATTR_MMIO | DMA_ATTR_REQUIRE_COHERENT)) > >> - return DMA_MAPPING_ERROR; > >> + if (attrs & (DMA_ATTR_MMIO | DMA_ATTR_REQUIRE_COHERENT)) > >> + return DMA_MAPPING_ERROR; > >> > >> - return swiotlb_map(dev, phys, size, dir, attrs); > >> - } > >> - } else if (attrs & DMA_ATTR_CC_SHARED) { > >> - return DMA_MAPPING_ERROR; > >> + return swiotlb_map(dev, phys, size, dir, attrs); > >> } > >> > >> - if (attrs & DMA_ATTR_MMIO) { > >> - dma_addr = phys; > >> - if (unlikely(!dma_capable(dev, dma_addr, size, false, attrs))) > >> - goto err_overflow; > >> - } else if (attrs & DMA_ATTR_CC_SHARED) { > >> + if (attrs & DMA_ATTR_CC_SHARED) > >> dma_addr = phys_to_dma_unencrypted(dev, phys); > >> + else > >> + dma_addr = phys_to_dma_encrypted(dev, phys); > > > > For AMD/SME, on host with memory encryption we now end up setting the C > > bit for DMA_ATTR_MMIO. This is fine for RAM but not sure whether > > some other MMIO bus understands this attribute. Maybe we should stick to > > something like __phys_to_dma() for the !CC_SHARED && MMIO path. Or, > > since this is not universally defined, just use the old dma_addr = phys > > if MMIO and ignore any unlikely DMA offsets. > > > > Considering for AMD/SME system an unencrypted dma addr is one without C > bit, will this be good? > > /* > * For host memory encryption and device requiring unencrypted DMA, > * MMIO memory is treated as shared by default. > */ > if (attrs & DMA_ATTR_MMIO) { > if (cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT) || force_dma_unencrypted(dev)) > attrs |= DMA_ATTR_CC_SHARED; > } Yes, I think it does the trick, preserves the current semantics for AMD. I guess you could use a single 'if' for all checks (up to you). -- Catalin