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charset=us-ascii Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260702_200618_610505_C18E8112 X-CRM114-Status: GOOD ( 23.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Mark, On Thu, Jul 02, 2026 at 11:45:14AM +0100, Mark Rutland wrote: > On Wed, Jul 01, 2026 at 03:11:28PM +0530, Linu Cherian wrote: > > Add MMFR2 ID based BBML3 feature detection, so > > that compliant cpus doesn't need to be added to the > > midr list. > > > > Signed-off-by: Linu Cherian > > --- > > arch/arm64/kernel/cpufeature.c | 14 +++++++------- > > arch/arm64/tools/sysreg | 1 + > > 2 files changed, 8 insertions(+), 7 deletions(-) > > > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index 9986eb7b379c..d754b1b7da77 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -2133,6 +2133,7 @@ static bool hvhe_possible(const struct arm64_cpu_capabilities *entry, > > > > bool cpu_supports_bbml3(void) > > { > > + u64 mmfr2; > > /* CPUs that support BBML3 but dont advertise through MMFR2 ID */ > > static const struct midr_range supports_bbml3_list[] = { > > MIDR_REV_RANGE(MIDR_CORTEX_X4, 0, 3, 0xf), > > @@ -2144,15 +2145,14 @@ bool cpu_supports_bbml3(void) > > {} > > }; > > > > - if (!is_midr_in_range_list(supports_bbml3_list)) > > - return false; > > + if (is_midr_in_range_list(supports_bbml3_list)) > > + return true; > > > > - /* > > - * We currently ignore the ID_AA64MMFR2_EL1 register, and only care > > - * about whether the MIDR check passes. > > - */ > > + mmfr2 = __read_sysreg_by_encoding(SYS_ID_AA64MMFR2_EL1); > > + if (SYS_FIELD_GET(ID_AA64MMFR2_EL1, BBM, mmfr2) == ID_AA64MMFR2_EL1_BBM_3) > > + return true; > > This needs to be '>=', so that if there's a future BBML4, we correctly > detect that CPUs with BBML4 also have the BBML3 behaviour. > > It would also be better to check the ID field first, before falling back > to the MIDR check. That way a reader can more clearly see that > supports_bbml3_list catches older parts that don't advertised BBML3, and > the comment above supports_bbml3_list would be clearer. Okay, agree. -- Thanks, Linu Cherian.