From: Frank Li <Frank.li@oss.nxp.com>
To: hongxing.zhu@oss.nxp.com
Cc: frank.li@nxp.com, l.stach@pengutronix.de, lpieralisi@kernel.org,
kwilczynski@kernel.org, mani@kernel.org, robh@kernel.org,
bhelgaas@google.com, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
imx@lists.linux.dev, linux-kernel@vger.kernel.org,
Richard Zhu <hongxing.zhu@nxp.com>
Subject: Re: [PATCH v1] PCI: imx6: Add runtime PM support for i.MX95
Date: Mon, 6 Jul 2026 10:48:11 -0500 [thread overview]
Message-ID: <akvOO5ssYij30poT@SMW015318> (raw)
In-Reply-To: <20260706091639.3886856-1-hongxing.zhu@oss.nxp.com>
On Mon, Jul 06, 2026 at 05:16:39PM +0800, hongxing.zhu@oss.nxp.com wrote:
> From: Richard Zhu <hongxing.zhu@nxp.com>
>
> Enable runtime PM support for i.MX95 PCIe Root Complex to allow dynamic
> power management when the PCIe link is idle.
>
> The i.MX95 PCIe controller supports entering D3hot state when PCIe
> devices are not actively in use. This implementation uses
> pm_runtime_no_callbacks() to leverage the PCI core's generic runtime PM
> handling. The PCI core automatically manages D-state transitions based
> on the runtime PM state of connected endpoint devices.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 20 +++++++++++++++++++-
> 1 file changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 023145b0dd2c7..3c13f9888ab9a 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -130,6 +130,7 @@ enum imx_pcie_variants {
> #define IMX_PCIE_FLAG_SKIP_L23_READY BIT(12)
> /* Preserve MSI capability for platforms that require it */
> #define IMX_PCIE_FLAG_KEEP_MSI_CAP BIT(13)
> +#define IMX_PCIE_FLAG_PM_RUNTIME BIT(14)
>
> #define imx_check_flag(pci, val) (pci->drvdata->flags & val)
>
> @@ -1982,6 +1983,16 @@ static int imx_pcie_probe(struct platform_device *pdev)
> */
> imx_pcie_add_lut_by_rid(imx_pcie, 0);
> } else {
> + if (imx_pcie->drvdata->flags & IMX_PCIE_FLAG_PM_RUNTIME) {
> + pm_runtime_no_callbacks(dev);
> + devm_pm_runtime_enable(dev);
Need check return value;
> + ret = pm_runtime_get_sync(dev);
Is devm_pm_runtime_set_active_enabled() and devm_pm_runtime_get_noresume()
help your case? and simplify below error path.
> + if (ret < 0) {
> + pm_runtime_put_noidle(dev);
> + return ret;
> + }
> + }
> +
> /*
> * i.MX RC is powered off during suspend, force L2 entry to
> * ensure proper endpoint notification before power loss.
> @@ -1993,8 +2004,11 @@ static int imx_pcie_probe(struct platform_device *pdev)
> pci->pp.keep_rp_msi_en = true;
> pci->pp.use_atu_msg = true;
> ret = dw_pcie_host_init(&pci->pp);
> - if (ret < 0)
> + if (ret < 0) {
> + if (imx_pcie->drvdata->flags & IMX_PCIE_FLAG_PM_RUNTIME)
> + pm_runtime_put(dev);
> return ret;
> + }
>
> if (pci_msi_enabled()) {
> u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI);
> @@ -2012,6 +2026,9 @@ static void imx_pcie_shutdown(struct platform_device *pdev)
> {
> struct imx_pcie *imx_pcie = platform_get_drvdata(pdev);
>
> + if (imx_pcie->drvdata->flags & IMX_PCIE_FLAG_PM_RUNTIME)
> + pm_runtime_disable(&pdev->dev);
> +
You use devm_pm_runtime_enable(), Needn't call pm_runtime_disable here.
Frank
> /* bring down link, so bootloader gets clean state in case of reboot */
> imx_pcie_assert_core_reset(imx_pcie);
> imx_pcie_assert_perst(imx_pcie, true);
> @@ -2130,6 +2147,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .flags = IMX_PCIE_FLAG_HAS_SERDES |
> IMX_PCIE_FLAG_HAS_LUT |
> IMX_PCIE_FLAG_8GT_ECN_ERR051586 |
> + IMX_PCIE_FLAG_PM_RUNTIME |
> IMX_PCIE_FLAG_SUPPORTS_SUSPEND,
> .ltssm_off = IMX95_PE0_GEN_CTRL_3,
> .ltssm_mask = IMX95_PCIE_LTSSM_EN,
> --
> 2.34.1
>
>
prev parent reply other threads:[~2026-07-06 15:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-06 9:16 [PATCH v1] PCI: imx6: Add runtime PM support for i.MX95 hongxing.zhu
2026-07-06 15:48 ` Frank Li [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=akvOO5ssYij30poT@SMW015318 \
--to=frank.li@oss.nxp.com \
--cc=bhelgaas@google.com \
--cc=festevam@gmail.com \
--cc=frank.li@nxp.com \
--cc=hongxing.zhu@nxp.com \
--cc=hongxing.zhu@oss.nxp.com \
--cc=imx@lists.linux.dev \
--cc=kernel@pengutronix.de \
--cc=kwilczynski@kernel.org \
--cc=l.stach@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=robh@kernel.org \
--cc=s.hauer@pengutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox