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[2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5b291e0ea8dsm2337558e87.41.2026.07.20.06.24.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 06:24:22 -0700 (PDT) Date: Mon, 20 Jul 2026 16:24:20 +0300 From: Dmitry Baryshkov To: Cristian Ciocaltea Cc: Vinod Koul , Neil Armstrong , Heiko Stuebner , Algea Cao , Dmitry Baryshkov , kernel@collabora.com, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Thomas =?iso-8859-1?Q?Niederpr=FCm?= , Simon Wright Subject: Re: [PATCH v4 1/8] phy: rockchip: samsung-hdptx: Fix rate recalculation for high bpc Message-ID: References: <20260612-hdptx-clk-fixes-v4-0-ce5e1d456cda@collabora.com> <20260612-hdptx-clk-fixes-v4-1-ce5e1d456cda@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260612-hdptx-clk-fixes-v4-1-ce5e1d456cda@collabora.com> X-Proofpoint-ORIG-GUID: rARWVoZaNhWHAhu-3ijkPGkUfhO-DL4W X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIwMDE0OSBTYWx0ZWRfX6ynZpLkUYTXC mJtNnhyjFvhW38lkGf+kqsdFVwcIG2/+iwC5xODMTNb5Js9Z3nkr3SZ3veFHQFrXMFLXGLOmt+l yWQBlBqAfFg6q5hc/tsLBVpHJXrhQP8= X-Authority-Analysis: v=2.4 cv=G58s1dk5 c=1 sm=1 tr=0 ts=6a5e2188 cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=xqWC_Br6kY4A:10 a=8nJEP1OIZ-IA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=QX4gbG5DAAAA:8 a=EUspDBNiAAAA:8 a=LBX7SfcbrNp00noYVVsA:9 a=3ZKOabzyN94A:10 a=wPNLvfGTeEIA:10 a=kacYvNCVWA4VmyqE58fU:22 a=AbAUZ8qAyYyZVLSsDulk:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIwMDE0OSBTYWx0ZWRfX4FqCUPtGQD+c u3saG8O1suV5GspUYvL9P0pcjc1PshimzI0n8/ggUhz1ZFM1uEEFdaEAIOb4dL7Gl4S/NHbsg0S c9ZQCBRLwu2JGZs3GHF3Anm6Y8JPQ/qG/s/69yT3ZglggrYFtYzeK1R0MTHb5xR49tXRLBaDXE1 YaT4Vq3cEW41XuV/kvIpWrg2SZmO+txlA2ALiqzFfJT7CjaQLu7SP7Hn6RqXNnjBvZcYkZ+Grdn XFpKBeTm9LDDjp8atNtal7kPy9D79SN2y4GvaR86iLFYwlOGhKyT8T5G8576uybWvRKOwZ2oiP7 lADjjj+mFu2VOTfn8LCgvOzBqQB00F2T+CEiQd6cC4lyMPNsWiVJ2L7d/WA6RmM+ETVIoCq3VY0 XojvRvCjINx9O8IkOJ2+QFhMgH4cAYTXafu0pNLtJFRiLW+kN3sUVXuVWUESIkflzTlcULmqhFF C4Sf+B2a9APLX9PcD1w== X-Proofpoint-GUID: rARWVoZaNhWHAhu-3ijkPGkUfhO-DL4W X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-20_02,2026-07-20_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 clxscore=1015 spamscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 phishscore=0 bulkscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607200149 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260720_062426_340705_B485BFF5 X-CRM114-Status: GOOD ( 17.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Jun 12, 2026 at 02:45:20AM +0300, Cristian Ciocaltea wrote: > The PHY PLL can be programmed by an external component, e.g. the > bootloader, just before the recalc_rate() callback is invoked during > devm_clk_hw_register() in the probe path. > > Therefore rk_hdptx_phy_clk_recalc_rate() finds the PLL enabled and > attempts to compute the clock rate, while making use of the bpc value > from the HDMI PHY configuration, which always defaults to 8 because > phy_configure() was not run at that point. As a consequence, the > (re)calculated rate is incorrect when the actual bpc was higher than 8. > > Do not rely on any of the hdmi_cfg members when computing the clock rate > and, instead, read the required input data (i.e. bpc), directly from the > hardware registers. > > Fixes: 3481fc04d969 ("phy: rockchip: samsung-hdptx: Compute clk rate from PLL config") > Tested-by: Thomas Niederprüm > Tested-by: Simon Wright > Signed-off-by: Cristian Ciocaltea > --- > drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 13 ++++--------- > 1 file changed, 4 insertions(+), 9 deletions(-) > Reviewed-by: Dmitry Baryshkov -- With best wishes Dmitry