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[34.77.69.137]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-69a19cd87d6sm11239809a12.6.2026.07.10.09.01.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Jul 2026 09:01:11 -0700 (PDT) Date: Fri, 10 Jul 2026 17:01:07 +0100 From: Vincent Donnefort To: Mostafa Saleh Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, iommu@lists.linux.dev, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, joro@8bytes.org, jean-philippe@linaro.org, jgg@ziepe.ca, mark.rutland@arm.com, qperret@google.com, tabba@google.com, sebastianene@google.com, keirf@google.com Subject: Re: [PATCH v6 16/25] iommu/arm-smmu-v3-kvm: Add CMDQ functions Message-ID: References: <20260501111928.259252-1-smostafa@google.com> <20260501111928.259252-17-smostafa@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260501111928.259252-17-smostafa@google.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260710_090114_886707_3F6DF889 X-CRM114-Status: GOOD ( 26.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, May 01, 2026 at 11:19:18AM +0000, Mostafa Saleh wrote: > Add functions to access the command queue, there are 2 main usage: > - Hypervisor's own commands, as TLB invalidation, would use functions > as smmu_send_cmd(), which creates and sends a command. > - Add host commands to the shadow command queue, after being filtered, > these will be added with smmu_add_cmd_raw. > > Signed-off-by: Mostafa Saleh > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 14 ++- > .../iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c | 107 ++++++++++++++++++ > 2 files changed, 115 insertions(+), 6 deletions(-) > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > index f904f4d19609..3fc499608d76 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > @@ -1156,19 +1156,21 @@ u32 smmu_idr5_to_oas(u32 reg); > unsigned long smmu_idr5_to_pgsize(u32 reg); > > /* Queue functions shared between kernel and hyp. */ > -static inline bool queue_has_space(struct arm_smmu_ll_queue *q, u32 n) > +static inline u32 queue_space(struct arm_smmu_ll_queue *q) > { > - u32 space, prod, cons; > + u32 prod, cons; > > prod = Q_IDX(q, q->prod); > cons = Q_IDX(q, q->cons); > > if (Q_WRP(q, q->prod) == Q_WRP(q, q->cons)) > - space = (1 << q->max_n_shift) - (prod - cons); > - else > - space = cons - prod; > + return (1 << q->max_n_shift) - (prod - cons); > + return cons - prod; > +} > > - return space >= n; > +static inline bool queue_has_space(struct arm_smmu_ll_queue *q, u32 n) > +{ > + return queue_space(q) >= n; > } > > static inline bool queue_full(struct arm_smmu_ll_queue *q) > diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c > index 3b77796dafc7..aac455599728 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c > @@ -6,6 +6,7 @@ > */ > #include > > +#include > #include > #include > #include > @@ -22,6 +23,31 @@ struct hyp_arm_smmu_v3_device *kvm_hyp_arm_smmu_v3_smmus; > > #define cmdq_size(cmdq) ((1 << ((cmdq)->llq.max_n_shift)) * CMDQ_ENT_DWORDS * 8) I only looked at that smmu_wait() as this is the hyp_clock_ns() caller. > > +/* > + * Wait until @cond is true. > + * Return 0 on success, or -ETIMEDOUT nit: Would be nice to explain use_wfe. > + */ > +#define smmu_wait(use_wfe, _cond) \ nit:, (__use_wfe, __cond), or (use_fw, cond) > +({ \ > + int __ret = 0; \ > + u64 delay = hyp_clock_ns() + ARM_SMMU_POLL_TIMEOUT_US * 1000; \ Does it help to lower the risk for the 128-bits fallback if we keep the resolution to _us? Also, ARM_SMMU_POLL_TIMEOUT_US seems to be 1s. Blocking that long at EL2 is really terrible. Any chance to lower that? > + \ > + while (!(_cond)) { \ > + if (use_wfe) { \ > + wfe(); \ > + if ((_cond)) \ nit: I believe there's no need for the double () here is there? > + break; \ > + } else { \ > + cpu_relax(); \ > + } \ > + if (hyp_clock_ns() >= delay) { \ > + __ret = -ETIMEDOUT; \ > + break; \ > + } \ > + } \ > + __ret; \ > +}) > + [...]