From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 78E4DC44507 for ; Wed, 15 Jul 2026 12:03:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=/7ZqQUQ8cgaxKWXeJyGjzq+OTwqxLCWIQt2QhPkSk4U=; b=uLyNC33mBAVimFbCSeOnDcvDNJ d4Th5rZUizFwqwFnUPCjBp4HCz6HNZp7SZKHjjPXgjjXGS490TmKwvLZsG0OBFCZKp89m2ryRIjFy wRfq9mk39gDlpmhOWbke8FJv3S4Gb6grRq6mU2X5sULBgE1NINXSc0URWi6383HEddAObIo8Y7QC1 DXuZKgN3PQ8sttizZaMJswgqkIKg/LgaJ3d0QM9iVswhS/OFEaphKPBJt9KMSBYRodcec+aZSzb0u L41Y7vxZy9E6dOIp9dPxNoIfKix51dFXGQyt4+0u2QoRTNur9rYkPP9nUlXV5TGCuiVjbga6z/MHe be8H0H5g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wjyKp-0000000EhVq-0JSB; Wed, 15 Jul 2026 12:03:31 +0000 Received: from tor.source.kernel.org ([172.105.4.254]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1wjyKn-0000000EhVP-1RzD for linux-arm-kernel@lists.infradead.org; Wed, 15 Jul 2026 12:03:29 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id 6D8EA6001A; Wed, 15 Jul 2026 12:03:28 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 52FA21F000E9; Wed, 15 Jul 2026 12:03:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1784117008; bh=/7ZqQUQ8cgaxKWXeJyGjzq+OTwqxLCWIQt2QhPkSk4U=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=dgoekp6tg/cWwLwIo+C7mFpK8kF06UfEo4Chrbi3LavY6sy1QOQg0MhXDIQVwWbgi f3F55c2trpg+d5M1T4A9C2SLo9OZPGVgkNGAA31txg86NTkU3VypMs59waGWViKmO0 yRKBMypgWDBxujJReTUvepotNz4P6B7Ywn7EsI2YodA2ZzMIcYKdF+idtVoVFrQprD R+nIqeeZnrTOLe36iahZhRGOPyhIwbX4fuiQeMYHuBPRk/2/DFMotFFjoRQ79RoWI2 LSkd4EoOdYQUK51gLT3uVpb2fdyxRJD8jTaZPlW+0rMLLimAVTclIRFX7pRvTtFWq+ GUFEhopNxw8LA== Date: Wed, 15 Jul 2026 13:03:22 +0100 From: Will Deacon To: Jason Gunthorpe Cc: Vijayanand Jitta , "Joerg Roedel (AMD)" , Robin Murphy , linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Prakash Gupta Subject: Re: [PATCH] iommu/io-pgtable-arm: Add support for contiguous hint bit Message-ID: References: <20260618-iommu_contig_hint-v1-1-4502a59e6388@oss.qualcomm.com> <20260703161228.GA1948451@nvidia.com> <20260715113913.GA3775915@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260715113913.GA3775915@nvidia.com> X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jul 15, 2026 at 08:39:13AM -0300, Jason Gunthorpe wrote: > On Wed, Jul 15, 2026 at 11:25:42AM +0530, Vijayanand Jitta wrote: > > On 7/3/2026 9:42 PM, Jason Gunthorpe wrote: > > > On Thu, Jun 18, 2026 at 02:32:09PM +0530, Vijayanand Jitta wrote: > > >> From: Prakash Gupta > > >> > > >> Add support for the contiguous hint (CONT) bit in ARM LPAE page tables. > > >> When a set of consecutive PTEs map a naturally-aligned contiguous block > > >> of memory, the CONT bit can be set on all entries in the group to allow > > >> the hardware to combine them into a single TLB entry, improving TLB > > >> utilization. > > >> > > >> The contiguous hint sizes per granule are: > > >> > > >> Page Size | CONT PTE | PMD | CONT PMD > > >> ----------+----------+-------+--------- > > >> 4K | 64K | 2M | 32M > > >> 16K | 2M | 32M | 1G > > >> 64K | 2M | 512M | 16G > > > > > > My series to convert smmuv3 to the iommupt takes care of this and > > > supports all the orders too. I'd rather we move forward with that then > > > try to patch up this. > > > > Thanks for details, I have gone through your series. As this patch > > targets io-pgtable-arm.c directly and would benefit all its users (SMMUv2, > > Apple DART, etc.), not just SMMUv3. I think there will still be value in > > this patch for the other users. > > If other users care they should also be converted to iommupt, there > are many benefits to this besides just cont support. I really have no interest in maintaining two copies of the page-table code, so I agree that we should convert users of the architectural (long descriptor) page-table format over to iommupt with a view to removing the io-pgtable implementation eventually. If you want two parallel implementations, then one should really be in rust :) >From what I can tell, the fiddly parts for iommupt will be: 1. Hardware bugs / quirks. Some of the simpler ones could probably be handled but for the more invasive stuff like the Mali format format, io-pgtable will probably need to hang around. Perhaps it becomes io-pgtable-mali.c? 2. The pKVM work from Mostafa. We'll probably end up with something separate at EL2 for this (ideally, just reusing the CPU page-table code when it learns about BBML3). 3. Non-coherent walkers, although I think this might actually be fine because x86 needs it anyway? So, for now, I wouldn't require new drivers to use iommupt but I'm not particularly keen about teaching io-pgtable new architectural tricks either. Will