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[34.77.69.137]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47f476e9d02sm16837588f8f.19.2026.07.15.06.48.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jul 2026 06:48:53 -0700 (PDT) Date: Wed, 15 Jul 2026 14:48:50 +0100 From: Vincent Donnefort To: Mostafa Saleh Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, iommu@lists.linux.dev, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, joro@8bytes.org, jgg@ziepe.ca, mark.rutland@arm.com, qperret@google.com, tabba@google.com, sebastianene@google.com, keirf@google.com Subject: Re: [PATCH v7 01/24] KVM: arm64: Add a generic clock Message-ID: References: <20260715115906.2664882-1-smostafa@google.com> <20260715115906.2664882-2-smostafa@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260715115906.2664882-2-smostafa@google.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260715_064856_934723_B24800CC X-CRM114-Status: GOOD ( 20.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org [...] > diff --git a/arch/arm64/kvm/hyp/nvhe/clock.c b/arch/arm64/kvm/hyp/nvhe/clock.c > index f3e2619db4e4..43d2cba4f810 100644 > --- a/arch/arm64/kvm/hyp/nvhe/clock.c > +++ b/arch/arm64/kvm/hyp/nvhe/clock.c > @@ -8,7 +8,12 @@ > > #include > #include > +#include > +#include > > +static u32 timer_freq; > + > +#ifdef CONFIG_NVHE_EL2_TRACING > static struct clock_data { > struct { > u32 mult; > @@ -66,3 +71,27 @@ u64 trace_hyp_clock(void) > > return (u64)ns + clock->data[bank].epoch_ns; > } > +#endif /* CONFIG_NVHE_EL2_TRACING */ > + > +int hyp_clock_init(void) > +{ > + timer_freq = read_sysreg(cntfrq_el0); > + /* > + * KVM will not initialize if FW didn't set cntfrq_el0, that is already > + * part of the boot protocol. > + */ > + if (!timer_freq) > + return -ENODEV; > + > + /* Timer freq can't be larger than 1Ghz by spec. */ > + if (timer_freq > NSEC_PER_SEC) > + return -EINVAL; > + > + return 0; > +} > + > +/* Return time in ns. */ > +u64 hyp_clock_ns(void) > +{ > + return mul_u64_u32_div(__arch_counter_get_cntvct(), NSEC_PER_SEC, timer_freq); IIUC, this will overflow the u64 mult very quickly (in few minutes) and also I see that we don't need such small nanoseconds accuracy. So here we could always fallback to 128-bits mult... or update the epoch from time to time. But I have something completely different to propose: Instead of using a "clock" how about we just modify smmu_wait? #define smmu_wait() { static u32 window = arch_timer_get_cntfrq() / ARM_SMMU_EL2_POLL_TIMEOUT_US u64 timeout = __arch_counter_get_cntvct() + window; u64 cur; ... while (!(__cond)) { ... cur = __arch_counter_get_cntvct(); if (cur >= timeout) __ret = -ETIMEOUT; No risk of overflowing u64 No init necessary > +} > diff --git a/arch/arm64/kvm/hyp/nvhe/setup.c b/arch/arm64/kvm/hyp/nvhe/setup.c > index 75b00c323310..970c5cf342f5 100644 > --- a/arch/arm64/kvm/hyp/nvhe/setup.c > +++ b/arch/arm64/kvm/hyp/nvhe/setup.c > @@ -10,6 +10,7 @@ > #include > #include > > +#include > #include > #include > #include > @@ -320,6 +321,10 @@ void __noreturn __pkvm_init_finalise(void) > if (ret) > goto out; > > + ret = hyp_clock_init(); > + if (ret) > + goto out; > + > ret = fix_host_ownership(); > if (ret) > goto out; > -- > 2.55.0.141.g00534a21ce-goog >