From: tglx@linutronix.de (Thomas Gleixner)
To: linux-arm-kernel@lists.infradead.org
Subject: [Patch V1 0/6] Refine generic/PCI MSI irqodmian interfaces
Date: Thu, 13 Nov 2014 22:11:26 +0100 (CET) [thread overview]
Message-ID: <alpine.DEB.2.11.1411132207470.3935@nanos> (raw)
In-Reply-To: <54651BE2.9080008@arm.com>
On Thu, 13 Nov 2014, Marc Zyngier wrote:
> With the new stacked irq domains, it becomes pretty tempting
> to allocate an MSI domain per PCI bus, which would remove
> the requirement of either relying on arch-specific code, or
> a default PCI MSI domain.
Right. That's what I roughly had in mind. And that would solve the
multi-iommu issue on x86 nicely as well. We establish the association
at the time where the bus gets populated. So the whole lookup magic
simply goes away.
Thanks,
tglx
next prev parent reply other threads:[~2014-11-13 21:11 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-13 11:43 [Patch V1 0/6] Refine generic/PCI MSI irqodmian interfaces Jiang Liu
2014-11-13 11:43 ` [Patch V1 1/6] PCI, MSI: Fix errors caused by commit e5f1a59c4e12 Jiang Liu
2014-11-13 11:43 ` [Patch V1 2/6] PCI, MSI: Introduce helpers to hide struct msi_desc implemenation details Jiang Liu
2014-11-13 11:43 ` [Patch V1 3/6] genirq: Introduce msi_domain_{alloc|free}_irqs() Jiang Liu
2014-11-13 20:23 ` Marc Zyngier
2014-11-14 0:18 ` Jiang Liu
2014-11-13 11:43 ` [Patch V1 3/6] genirq: Introduce msi_irq_domain_{alloc|free}_irqs() Jiang Liu
2014-11-13 12:34 ` Yijing Wang
2014-11-13 12:41 ` Jiang Liu
2014-11-13 12:57 ` Yijing Wang
2014-11-13 11:43 ` [Patch V1 4/6] genirq: Provide default callbacks for msi_domain_ops Jiang Liu
2014-11-13 11:43 ` [Patch V1 5/6] PCI, MSI: Refine irqdomain interfaces to simplify its usage Jiang Liu
2014-11-13 11:43 ` [Patch V1 6/6] PCI, MSI: Provide mechanism to alloc/free MSI/MSIX interrupt from irqdomain Jiang Liu
2014-11-13 19:46 ` Marc Zyngier
2014-11-13 12:28 ` [Patch V1 0/6] Refine generic/PCI MSI irqodmian interfaces Yijing Wang
2014-11-13 12:39 ` Jiang Liu
2014-11-13 12:55 ` Yijing Wang
2014-11-13 13:03 ` Jiang Liu
2014-11-13 13:05 ` Jiang Liu
2014-11-13 21:00 ` Marc Zyngier
2014-11-13 21:11 ` Thomas Gleixner [this message]
2014-11-13 21:28 ` Marc Zyngier
2014-11-14 15:54 ` Jiang Liu
2014-11-14 16:13 ` Marc Zyngier
2014-11-14 0:25 ` Jiang Liu
2014-11-14 1:09 ` Yijing Wang
2014-11-14 1:22 ` Jiang Liu
2014-11-14 1:31 ` Thomas Gleixner
2014-11-14 1:39 ` Jiang Liu
2014-11-14 12:13 ` Thomas Gleixner
2014-11-14 14:11 ` Yijing Wang
2014-11-14 14:26 ` Jiang Liu
2014-11-14 15:16 ` Marc Zyngier
2014-11-14 15:25 ` Jiang Liu
2014-11-14 16:03 ` Marc Zyngier
2014-11-14 17:11 ` Lucas Stach
2014-11-14 2:16 ` Yijing Wang
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