From: tglx@linutronix.de (Thomas Gleixner)
To: linux-arm-kernel@lists.infradead.org
Subject: Removal of bus->msi assignment breaks MSI with stacked domains
Date: Fri, 21 Nov 2014 11:49:05 +0100 (CET) [thread overview]
Message-ID: <alpine.DEB.2.11.1411211142051.6439@nanos> (raw)
In-Reply-To: <546F140B.1050607@arm.com>
Marc,
On Fri, 21 Nov 2014, Marc Zyngier wrote:
> On 21/11/14 01:46, Thomas Gleixner wrote:
> > So the real question is:
> >
> > What is the association level requirement to properly identify the
> > irqdomain for a specific device on any given architecture with and
> > without IOMMU, interrupt redirection etc.
> >
> > To be honest: I don't know.
> >
> > My gut feeling tells me that it's at the device level, but I really
> > leave that decision to the experts in that field.
>
> Given the above requirement (single device associated to DMAR), I can
> see two possibilities:
> - we represent DMAR as a single PCI bus: feels a bit artificial
> - we move the MSI domain to the device, as you suggested.
>
> The second one seems a lot more attractive to me.
And that's very useful if you want to support MSI on non PCI
devices.
> Also, it is not clear to me what is the advantage of getting rid of the
> MSI controller. By doing so, we loose an important part of the topology
> information (the irq domain is another level of abstraction).
That was probably my misunderstanding of the msi controller. I had the
impression it's just there to expose the MSI properties of a device,
i.e. a magic wrapper which can be replaced by the MSI irqdomain work.
If that handles other information as well, then it's probably a
misnomer to begin with.
Thanks,
tglx
next prev parent reply other threads:[~2014-11-21 10:49 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-20 16:31 Removal of bus->msi assignment breaks MSI with stacked domains Marc Zyngier
2014-11-20 21:53 ` Bjorn Helgaas
2014-11-20 23:10 ` Thomas Gleixner
2014-11-20 23:30 ` Bjorn Helgaas
2014-11-21 9:33 ` Marc Zyngier
2014-11-21 1:54 ` Yijing Wang
2014-11-21 2:25 ` Jiang Liu
2014-11-21 3:46 ` Yijing Wang
2014-11-21 10:00 ` Marc Zyngier
2014-11-21 17:31 ` Bjorn Helgaas
2014-11-22 4:13 ` Yijing Wang
2014-11-21 1:22 ` Yijing Wang
2014-11-21 1:46 ` Thomas Gleixner
2014-11-21 2:03 ` Jiang Liu
2014-11-21 2:12 ` Yijing Wang
2014-11-21 2:05 ` Yijing Wang
2014-11-21 8:46 ` Lucas Stach
2014-11-21 10:29 ` Marc Zyngier
2014-11-21 10:49 ` Thomas Gleixner [this message]
2014-11-21 11:30 ` Marc Zyngier
2014-11-21 12:04 ` Yijing Wang
2014-11-21 10:11 ` Marc Zyngier
2014-11-21 11:57 ` Yijing Wang
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