From: tglx@linutronix.de (Thomas Gleixner)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] irqchip: atmel-aic5: fix bug with mask/unmask
Date: Tue, 22 Sep 2015 12:27:08 +0200 (CEST) [thread overview]
Message-ID: <alpine.DEB.2.11.1509221226090.5606@nanos> (raw)
In-Reply-To: <1442843173-2390-1-git-send-email-ludovic.desroches@atmel.com>
On Mon, 21 Sep 2015, Ludovic Desroches wrote:
> diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c
> index 9da9942..6c5fd25 100644
> --- a/drivers/irqchip/irq-atmel-aic5.c
> +++ b/drivers/irqchip/irq-atmel-aic5.c
> @@ -88,28 +88,30 @@ static void aic5_mask(struct irq_data *d)
> {
> struct irq_domain *domain = d->domain;
> struct irq_domain_chip_generic *dgc = domain->gc;
> - struct irq_chip_generic *gc = dgc->gc[0];
> + struct irq_chip_generic *bgc = dgc->gc[0];
> + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
>
> /* Disable interrupt on AIC5 */
> - irq_gc_lock(gc);
> + irq_gc_lock(bgc);
Why is this locking dgc->gc[0] and fiddling with some other generic
chip?
> irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR);
> irq_reg_writel(gc, 1, AT91_AIC5_IDCR);
Thanks,
tglx
next prev parent reply other threads:[~2015-09-22 10:27 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-21 13:46 [PATCH 1/3] irqchip: atmel-aic5: fix bug with mask/unmask Ludovic Desroches
2015-09-21 13:46 ` [PATCH 2/3] irqchip: atmel-aic5: fix variable naming Ludovic Desroches
2015-09-22 8:27 ` Nicolas Ferre
2015-09-21 13:46 ` [PATCH 3/3] irqchip: atmel-aic5: simplify base chip selection Ludovic Desroches
2015-09-22 8:27 ` Nicolas Ferre
2015-09-22 7:45 ` [PATCH 1/3] irqchip: atmel-aic5: fix bug with mask/unmask Boris Brezillon
2015-09-22 8:27 ` Nicolas Ferre
2015-09-22 10:27 ` Thomas Gleixner [this message]
2015-09-22 11:55 ` Boris Brezillon
2015-09-22 13:50 ` Thomas Gleixner
2015-09-22 14:07 ` Ludovic Desroches
[not found] ` <tip-478cc7b33413a4ad50852239d931d55e622f1cde@git.kernel.org>
2015-09-22 10:37 ` [tip:irq/urgent] irqchip/atmel-aic5: Use proper mask cache in mask/unmask() Thomas Gleixner
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