From: nico@fluxnic.net (Nicolas Pitre)
To: linux-arm-kernel@lists.infradead.org
Subject: ioremap to a specific virtual address
Date: Sat, 31 Mar 2012 19:52:31 -0400 (EDT) [thread overview]
Message-ID: <alpine.LFD.2.02.1203311943500.24151@xanadu.home> (raw)
In-Reply-To: <CAKON4OxVpV-2DGVswc2y+6B6LhLzkhn0ohpSEmDBCVoaNJ4vww@mail.gmail.com>
On Sat, 31 Mar 2012, jonsmirl at gmail.com wrote:
> On Fri, Mar 23, 2012 at 12:00 AM, Nicolas Pitre <nico@fluxnic.net> wrote:
> > On Thu, 22 Mar 2012, jonsmirl at gmail.com wrote:
> >
> >> When iotable is used to initially map memory you can specify the
> >> mapping address. In this case IO_SDMMC_PHYS is 0x18000000 and it gets
> >> mapped to ?0xf1800000
> >>
> >> NXP has supplied this handly macro
> >> #define io_p2v(x) (0xf0000000 | (((x) & 0xff000000) >> 4) | ((x) & 0x000fffff))
> >>
> >> iotable_init(lpc313x_io_desc, ARRAY_SIZE(lpc313x_io_desc));
> >>
> >> ? ? ? {
> >> ? ? ? ? ? ? ? .virtual ? ? ? ?= io_p2v(IO_SDMMC_PHYS),
> >> ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(IO_SDMMC_PHYS),
> >> ? ? ? ? ? ? ? .length ? ? ? ? = IO_SDMMC_SIZE,
> >> ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE
> >> ? ? ? },
> >>
> >> The supplied kernel is full of code that uses this type of addressing.
> >> It has macros for register definition that all depend on the registers
> >> being mapped to a well know location - io_p2v(x).
> >>
> >> I'd like to move the map out of the core code and into the SDMMC
> >> device driver and then only do it if the driver loads.
> >
> > Why would you do that? ?Those static mappings are meant to be global and
> > remain there. ?The handy macro is in fact not handy at all as it forces
> > virtual addresses on you.
> >
> > It is OK to keep the static mappings as you can use 1MB regions and the
> > mapping code will use first level mappings which are better with TLB
> > usage.
>
> I switched over to 1MB mappings. 1MB map regions are implemented on
> ARM9, right? Is there some way to see if I got the huge maps?
Once booted, you can look in /proc/vmallocinfo for the mappings in use.
There is no way to know for sure if the first level pagetable mappings
are actually used, unless you instrument the kernel code. But yes, all
ARM architectures with a MMU support 1MB regions.
Nicolas
next prev parent reply other threads:[~2012-03-31 23:52 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-23 0:23 ioremap to a specific virtual address jonsmirl at gmail.com
2012-03-23 4:00 ` Nicolas Pitre
2012-03-23 4:17 ` jonsmirl at gmail.com
2012-03-23 4:28 ` Nicolas Pitre
2012-03-23 13:25 ` jonsmirl at gmail.com
2012-03-23 14:07 ` Arnd Bergmann
2012-03-23 14:32 ` jonsmirl at gmail.com
2012-03-23 14:49 ` Arnd Bergmann
2012-03-23 15:20 ` Arnd Bergmann
2012-03-23 18:28 ` jonsmirl at gmail.com
2012-03-23 19:31 ` Arnd Bergmann
2012-03-24 1:14 ` jonsmirl at gmail.com
2012-03-25 17:34 ` Arnd Bergmann
2012-03-26 8:47 ` Arnd Bergmann
2012-03-26 13:11 ` jonsmirl at gmail.com
2012-03-26 11:21 ` jonsmirl at gmail.com
2012-03-23 14:52 ` Roland Stigge
2012-03-23 15:05 ` jonsmirl at gmail.com
2012-03-23 15:12 ` Roland Stigge
2012-03-31 23:12 ` jonsmirl at gmail.com
2012-03-31 23:52 ` Nicolas Pitre [this message]
2012-04-01 0:08 ` jonsmirl at gmail.com
2012-04-01 19:46 ` Arnd Bergmann
2012-04-01 21:41 ` jonsmirl at gmail.com
2012-04-02 1:18 ` Nicolas Pitre
2012-04-02 7:31 ` Arnd Bergmann
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