linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: nicolas.pitre@linaro.org (Nicolas Pitre)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 04/22] ARM: LPAE: support 64-bit virt/phys patching
Date: Sun, 5 Aug 2012 22:19:04 -0400 (EDT)	[thread overview]
Message-ID: <alpine.LFD.2.02.1208052207040.5231@xanadu.home> (raw)
In-Reply-To: <501E815D.1050707@ti.com>

On Sun, 5 Aug 2012, Cyril Chemparathy wrote:

> Hi Nicolas,
> 
> On 8/4/2012 2:49 AM, Nicolas Pitre wrote:
> > On Tue, 31 Jul 2012, Cyril Chemparathy wrote:
> > 
> > > This patch adds support for 64-bit physical addresses in virt_to_phys
> > > patching.  This does not do real 64-bit add/sub, but instead patches in
> > > the
> > > upper 32-bits of the phys_offset directly into the output of virt_to_phys.
> > 
> > You should explain _why_ you do not a real aadd/sub.  I did deduce it
> > but that might not be obvious to everyone.  Also this subtlety should be
> > commented in the code as well.
> > 
> 
> We could not do an ADDS + ADC here because the carry is not guaranteed to be
> retained and passed into the ADC.  This is because the compiler is free to
> insert all kinds of stuff between the two non-volatile asm blocks.
> 
> Is there another subtlety here that I have missed out on entirely?

The high bits for the valid physical memory address range for which 
virt_to_phys and phys_to_virt can be used are always the same.  
Therefore no aadition at all is needed, fake or real.  Only providing 
those bits in the top word for the value returned by virt_to_phys is 
needed.

> > > In addition to adding 64-bit support, this patch also adds a
> > > set_phys_offset()
> > > helper that is needed on architectures that need to modify PHYS_OFFSET
> > > during
> > > initialization.
> > > 
> > > Signed-off-by: Cyril Chemparathy <cyril@ti.com>
> > > ---
> > >   arch/arm/include/asm/memory.h |   22 +++++++++++++++-------
> > >   arch/arm/kernel/head.S        |    6 ++++++
> > >   arch/arm/kernel/setup.c       |   14 ++++++++++++++
> > >   3 files changed, 35 insertions(+), 7 deletions(-)
> > > 
> > > diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
> > > index 4a0108f..110495c 100644
> > > --- a/arch/arm/include/asm/memory.h
> > > +++ b/arch/arm/include/asm/memory.h
> > > @@ -153,23 +153,31 @@
> > >   #ifdef CONFIG_ARM_PATCH_PHYS_VIRT
> > > 
> > >   extern unsigned long __pv_phys_offset;
> > > -#define PHYS_OFFSET __pv_phys_offset
> > > -
> > > +extern unsigned long __pv_phys_offset_high;
> > 
> > As mentioned previously, this is just too ugly.  Please make
> > __pv_phys_offset into a phys_addr_t instead and mask the low/high parts
> > as needed in __virt_to_phys().
> > 
> 
> Maybe u64 instead of phys_addr_t to keep the sizing non-variable?

No.  When not using LPAE, we don't have to pay the price of a u64 value.  
That's why the phys_addr_t type is conditionally defined.  You already 
do  extra processing in virt_to_phys when sizeof(phys_addr_t) > 4 which 
is perfect for dealing with this issue.


Nicolas

  reply	other threads:[~2012-08-06  2:19 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-31 23:04 [PATCH 00/22] Introducing the TI Keystone platform Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 01/22] ARM: add mechanism for late code patching Cyril Chemparathy
2012-08-04  5:38   ` Nicolas Pitre
2012-08-05 13:56     ` Cyril Chemparathy
2012-08-07 22:52     ` Cyril Chemparathy
2012-08-08  5:56       ` Nicolas Pitre
2012-08-08 13:18         ` Cyril Chemparathy
2012-08-08 13:55           ` Nicolas Pitre
2012-08-08 16:05             ` Russell King - ARM Linux
2012-08-08 16:56               ` Nicolas Pitre
2012-08-09  6:59                 ` Tixy
2012-08-06 11:12   ` Russell King - ARM Linux
2012-08-06 13:19     ` Cyril Chemparathy
2012-08-06 13:26       ` Russell King - ARM Linux
2012-08-06 13:38         ` Cyril Chemparathy
2012-08-06 18:02         ` Nicolas Pitre
2012-07-31 23:04 ` [PATCH 02/22] ARM: use late patch framework for phys-virt patching Cyril Chemparathy
2012-08-04  6:15   ` Nicolas Pitre
2012-08-05 14:03     ` Cyril Chemparathy
2012-08-06  2:06       ` Nicolas Pitre
2012-07-31 23:04 ` [PATCH 03/22] ARM: LPAE: use phys_addr_t on virt <--> phys conversion Cyril Chemparathy
2012-08-04  6:24   ` Nicolas Pitre
2012-08-05 14:05     ` Cyril Chemparathy
2012-08-06 11:14   ` Russell King - ARM Linux
2012-08-06 13:30     ` Cyril Chemparathy
2012-08-09 14:10     ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 04/22] ARM: LPAE: support 64-bit virt/phys patching Cyril Chemparathy
2012-08-04  6:49   ` Nicolas Pitre
2012-08-05 14:21     ` Cyril Chemparathy
2012-08-06  2:19       ` Nicolas Pitre [this message]
2012-07-31 23:04 ` [PATCH 05/22] ARM: LPAE: use signed arithmetic for mask definitions Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 06/22] ARM: LPAE: use phys_addr_t in alloc_init_pud() Cyril Chemparathy
2012-08-01 12:08   ` Sergei Shtylyov
2012-08-01 15:42     ` Cyril Chemparathy
2012-08-04  6:51   ` Nicolas Pitre
2012-07-31 23:04 ` [PATCH 07/22] ARM: LPAE: use phys_addr_t in free_memmap() Cyril Chemparathy
2012-08-04  6:54   ` Nicolas Pitre
2012-07-31 23:04 ` [PATCH 08/22] ARM: LPAE: use phys_addr_t for initrd location and size Cyril Chemparathy
2012-08-04  6:57   ` Nicolas Pitre
2012-08-05 14:23     ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 09/22] ARM: LPAE: use 64-bit pgd physical address in switch_mm() Cyril Chemparathy
2012-08-04  7:04   ` Nicolas Pitre
2012-08-05 14:29     ` Cyril Chemparathy
2012-08-06  2:35       ` Nicolas Pitre
2012-07-31 23:04 ` [PATCH 10/22] ARM: LPAE: use 64-bit accessors for TTBR registers Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 11/22] ARM: LPAE: define ARCH_LOW_ADDRESS_LIMIT for bootmem Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 12/22] ARM: LPAE: factor out T1SZ and TTBR1 computations Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 13/22] ARM: LPAE: allow proc override of TTB setup Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 14/22] ARM: LPAE: accomodate >32-bit addresses for page table base Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 15/22] ARM: mm: use physical addresses in highmem sanity checks Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 16/22] ARM: mm: cleanup checks for membank overlap with vmalloc area Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 17/22] ARM: mm: clean up membank size limit checks Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 18/22] ARM: add virt_to_idmap for interconnect aliasing Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 19/22] ARM: recreate kernel mappings in early_paging_init() Cyril Chemparathy
2012-07-31 23:05 ` [RFC 21/22] ARM: keystone: enable SMP on Keystone machines Cyril Chemparathy
2012-07-31 23:05 ` [RFC 22/22] ARM: keystone: add switch over to high physical address range Cyril Chemparathy
2012-07-31 23:06 ` [RFC 20/22] ARM: keystone: introducing TI Keystone platform Cyril Chemparathy
2012-07-31 23:16   ` Arnd Bergmann
2012-08-01 15:41     ` Cyril Chemparathy
2012-08-01 17:20       ` Arnd Bergmann
2012-08-04  8:39 ` [PATCH 00/22] Introducing the " Russell King - ARM Linux
2012-08-05 15:10   ` Cyril Chemparathy
2012-08-08 15:43     ` Catalin Marinas
2012-08-08 13:57 ` Will Deacon

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=alpine.LFD.2.02.1208052207040.5231@xanadu.home \
    --to=nicolas.pitre@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).