From: nicolas.pitre@linaro.org (Nicolas Pitre)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2] ARM: errata: LoUIS bit field in CLIDR register is incorrect
Date: Thu, 6 Jun 2013 13:41:05 -0400 (EDT) [thread overview]
Message-ID: <alpine.LFD.2.03.1306061340150.18597@syhkavp.arg> (raw)
In-Reply-To: <alpine.LFD.2.03.1306061338030.18597@syhkavp.arg>
On Thu, 6 Jun 2013, Nicolas Pitre wrote:
> On Thu, 6 Jun 2013, Jon Medhurst (Tixy) wrote:
>
> > On Cortex-A9 before version r1p0, the LoUIS bit field of the CLIDR
> > register returns zero when it should return one. This leads to cache
> > maintenance operations which rely on this value to not function as
> > intended, causing data corruption.
> >
> > The workaround for this errata is to detect affected CPUs and correct
> > the LoUIS value read.
> >
> > Acked-by: Will Deacon <will.deacon@arm.com>
> > Signed-off-by: Jon Medhurst <tixy@linaro.org>
>
> Acked-by: Nicolas Pitre <nico@linaro.org>
>
> This wouldn't hurt adding 'CC: stable at kernel.org' as well.
"stable at vger.kernel.org" that is.
Nicolas
next prev parent reply other threads:[~2013-06-06 17:41 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-06 17:10 [PATCH v2] ARM: errata: LoUIS bit field in CLIDR register is incorrect Jon Medhurst (Tixy)
2013-06-06 17:39 ` Nicolas Pitre
2013-06-06 17:41 ` Nicolas Pitre [this message]
2013-06-06 20:38 ` Russell King - ARM Linux
2013-06-07 10:07 ` Jon Medhurst (Tixy)
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