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From: Brian Masney <bmasney@redhat.com>
To: Yu-Chun Lin <eleanor.lin@realtek.com>
Cc: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, p.zabel@pengutronix.de,
	cylee12@realtek.com, afaerber@suse.com, jyanchou@realtek.com,
	devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-realtek-soc@lists.infradead.org, james.tai@realtek.com,
	cy.huang@realtek.com, stanley_chang@realtek.com
Subject: Re: [PATCH v10 08/11] clk: realtek: Add support for MMC-tuned PLL clocks
Date: Tue, 21 Jul 2026 19:38:46 -0400	[thread overview]
Message-ID: <amADBr_DnBeGh2jg@redhat.com> (raw)
In-Reply-To: <20260713155630.3054636-9-eleanor.lin@realtek.com>

On Mon, Jul 13, 2026 at 11:56:27PM +0800, Yu-Chun Lin wrote:
> From: Cheng-Yu Lee <cylee12@realtek.com>
> 
> Add clk_pll_mmc_ops for enable/disable, prepare, rate control, and status
> operations on MMC PLL clocks.
> 
> Also add clk_pll_mmc_phase_ops to support phase get/set operations.
> 
> Signed-off-by: Cheng-Yu Lee <cylee12@realtek.com>
> Co-developed-by: Jyan Chou <jyanchou@realtek.com>
> Signed-off-by: Jyan Chou <jyanchou@realtek.com>
> Co-developed-by: Yu-Chun Lin <eleanor.lin@realtek.com>
> Signed-off-by: Yu-Chun Lin <eleanor.lin@realtek.com>
> ---
> Changes in v10:
> - None.
> ---
>  MAINTAINERS                       |   8 +
>  drivers/clk/realtek/Kconfig       |   3 +
>  drivers/clk/realtek/Makefile      |   2 +
>  drivers/clk/realtek/clk-pll-mmc.c | 430 ++++++++++++++++++++++++++++++
>  drivers/clk/realtek/clk-pll.h     |  13 +
>  5 files changed, 456 insertions(+)
>  create mode 100644 drivers/clk/realtek/clk-pll-mmc.c
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 1fffb1fc5de1..0c8b98ecc4a5 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -22747,6 +22747,14 @@ F:	drivers/reset/realtek/*
>  F:	include/dt-bindings/clock/realtek*
>  F:	include/dt-bindings/reset/realtek*
>  
> +REALTEK SOC PLL CLOCK FOR MMC SUPPORT
> +M:	Cheng-Yu Lee <cylee12@realtek.com>
> +M:	Jyan Chou <jyanchou@realtek.com>
> +M:	Yu-Chun Lin <eleanor.lin@realtek.com>
> +L:	linux-clk@vger.kernel.org
> +S:	Supported
> +F:	drivers/clk/realtek/clk-pll-mmc.c

2 of the 3 names listed here are under the new realtek entry added by
this series. I'm not sure how common this is but it seems overly
granular.

Brian



  reply	other threads:[~2026-07-21 23:39 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-13 15:56 [PATCH v10 00/11] clk / reset: realtek: Add RTD1625 clock and reset support Yu-Chun Lin
2026-07-13 15:56 ` [PATCH v10 01/11] dt-bindings: clock: Add Realtek RTD1625 Clock & Reset Controller Yu-Chun Lin
2026-07-13 15:56 ` [PATCH v10 02/11] reset: Add Realtek basic reset support Yu-Chun Lin
2026-07-22  7:08   ` Philipp Zabel
2026-07-13 15:56 ` [PATCH v10 03/11] reset: realtek: Add RTD1625 reset controller driver Yu-Chun Lin
2026-07-22  7:17   ` Philipp Zabel
2026-07-13 15:56 ` [PATCH v10 04/11] clk: realtek: Introduce a common probe() Yu-Chun Lin
2026-07-21 23:33   ` Brian Masney
2026-07-13 15:56 ` [PATCH v10 05/11] clk: realtek: Add support for phase locked loops (PLLs) Yu-Chun Lin
2026-07-13 15:56 ` [PATCH v10 06/11] clk: realtek: Add support for gate clock Yu-Chun Lin
2026-07-13 15:56 ` [PATCH v10 07/11] clk: realtek: Add support for mux clock Yu-Chun Lin
2026-07-13 15:56 ` [PATCH v10 08/11] clk: realtek: Add support for MMC-tuned PLL clocks Yu-Chun Lin
2026-07-21 23:38   ` Brian Masney [this message]
2026-07-13 15:56 ` [PATCH v10 09/11] clk: realtek: Add RTD1625-CRT clock controller driver Yu-Chun Lin
2026-07-13 15:56 ` [PATCH v10 10/11] clk: realtek: Add RTD1625-ISO " Yu-Chun Lin
2026-07-13 15:56 ` [PATCH v10 11/11] arm64: dts: realtek: Add clock support for RTD1625 Yu-Chun Lin

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