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Mon, 27 Jul 2026 05:48:32 -0700 (PDT) Received: from owl5 ([2001:861:3201:3d10:e302:2368:a20c:3848]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-496b4858cfdsm238084945e9.3.2026.07.27.05.48.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Jul 2026 05:48:31 -0700 (PDT) Date: Mon, 27 Jul 2026 14:48:30 +0200 From: Gary Bisson To: Thorsten Leemhuis Cc: AngeloGioacchino Del Regno , Chun-Kuang Hu , Esben Haabendal , Philipp Zabel , David Airlie , Simona Vetter , Matthias Brugger , dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Adam Thiede , Linux kernel regressions list Subject: Re: [PATCH] drm/mediatek: mtk_dsi: enable hs clock during pre-enable Message-ID: References: <20260120-mtkdsi-v1-1-b0f4094f3ac3@gmail.com> <8733xko1ms.fsf@geanix.com> <0f719c00-3cf5-4403-afbf-713b07255981@collabora.com> <65558ccc-4f2c-492d-8c74-627d27dce864@collabora.com> <87h5m0mkca.fsf@geanix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260727_054834_843572_F2CA8B22 X-CRM114-Status: GOOD ( 19.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Thorsten, On Mon, Jul 27, 2026 at 02:28:56PM +0200, Thorsten Leemhuis wrote: > [top-posting to facilitate] > > Gary, Angelo, what's the status here? It looks like this fell through > the cracks -- or was this issue fixed in between somehow? If yes: great! > If not: Would be good to finally resolve this, as we are long past "fix > within a week" rule of thumb from Linus: > https://www.kernel.org/doc/html/latest/process/handling-regressions.html#on-how-quickly-regressions-should-be-fixed Not much happened I'm afraid. The status as I see is: - this patch is necessary to have TI SN65DSI83 working - this patch also follows the DRM guidelines saying that HS clock must be enabled during pre_enable (see previous answer / [1]) - this patch has been successfully tested against MIPI-DSI panels (by Angelo) and LVDS panels via TI bridge (by myself) - Adam reported an issue with another bridge (PS8640) where resume is broken - Esben offered a patch to the TI bridge that would fix the issue we were seeing in the first place. But for the last two points, I'm not sure this calls for a revert yet: - enabling HS clock in pre_enable still is what should be done [1] - maybe the issue Adam is facing is due to the bridge driver instead as it could not be reproduced with another setup - Esben patch would break the SN65DSI83 init sequence, suggesting that the culprit really is the MIPI bridge for not following the HS clock requirement in pre_enable instead [2] So if we agree on the fact that HS clock must be set during pre_enable then I don't see a reason to revert that commit. Regards, Gary [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpu/drm/drm_bridge.c#n169 [2] https://patchwork.kernel.org/project/dri-devel/patch/20260711-ti-sn65dsi83-fixes-v1-2-d85eb5342b98@geanix.com/