From: Joey Gouly <joey.gouly@arm.com>
To: Fuad Tabba <fuad.tabba@linux.dev>
Cc: Marc Zyngier <maz@kernel.org>, Oliver Upton <oupton@kernel.org>,
kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Steffen Eiden <seiden@linux.ibm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Vincent Donnefort <vdonnefort@google.com>,
Quentin Perret <qperret@google.com>,
Sebastian Ene <sebastianene@google.com>,
Hyunwoo Kim <imv4bel@gmail.com>, Fuad Tabba <tabba@google.com>
Subject: Re: [PATCH v7 2/8] KVM: arm64: Make vcpu_{read,write}_sys_reg available to HYP code
Date: Wed, 29 Jul 2026 14:52:30 +0100 [thread overview]
Message-ID: <amoFnupIKfDEzN0F@e143914.arm.com> (raw)
In-Reply-To: <20260729131823.2021516-3-fuad.tabba@linux.dev>
On Wed, Jul 29, 2026 at 02:18:17PM +0100, Fuad Tabba wrote:
> The vcpu_{read,write}_sys_reg() accessors abstract where a system
> register lives, but their VHE implementation cannot be linked into the
> nVHE hypervisor, so exception.c open-codes has_vhe() wrappers instead.
>
> Redirect the accessors to the raw context accessors for nVHE hyp builds,
> where registers are always in memory, and drop the local wrappers. This
> lets hyp code reuse helpers built on the canonical accessors.
>
> No functional change intended.
>
> Suggested-by: Marc Zyngier <maz@kernel.org>
> Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev>
> ---
> arch/arm64/include/asm/kvm_emulate.h | 6 +++++
> arch/arm64/kvm/hyp/exception.c | 34 ++++++++--------------------
> 2 files changed, 15 insertions(+), 25 deletions(-)
>
> diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
> index 5bf3d7e1d92c7..fb4062b3ce55a 100644
> --- a/arch/arm64/include/asm/kvm_emulate.h
> +++ b/arch/arm64/include/asm/kvm_emulate.h
> @@ -506,6 +506,12 @@ static inline unsigned long kvm_vcpu_get_mpidr_aff(struct kvm_vcpu *vcpu)
> return __vcpu_sys_reg(vcpu, MPIDR_EL1) & MPIDR_HWID_BITMASK;
> }
>
> +/* In nVHE hyp code, registers are always in memory: use the raw accessors. */
> +#if defined(__KVM_NVHE_HYPERVISOR__)
> +#define vcpu_read_sys_reg(v, r) __vcpu_sys_reg(v, r)
> +#define vcpu_write_sys_reg(v, x, r) __vcpu_assign_sys_reg(v, r, x)
> +#endif
> +
Does this make sense in arch/arm64/include/asm/kvm_host.h instead? Next
to the definitions of __vcpu_sys_reg() etc.
Thanks,
Joey
> static inline void kvm_vcpu_set_be(struct kvm_vcpu *vcpu)
> {
> if (vcpu_mode_is_32bit(vcpu)) {
> diff --git a/arch/arm64/kvm/hyp/exception.c b/arch/arm64/kvm/hyp/exception.c
> index bef40ddb16dbc..754e2dc1df54a 100644
> --- a/arch/arm64/kvm/hyp/exception.c
> +++ b/arch/arm64/kvm/hyp/exception.c
> @@ -20,22 +20,6 @@
> #error Hypervisor code only!
> #endif
>
> -static inline u64 __vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg)
> -{
> - if (has_vhe())
> - return vcpu_read_sys_reg(vcpu, reg);
> -
> - return __vcpu_sys_reg(vcpu, reg);
> -}
> -
> -static inline void __vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg)
> -{
> - if (has_vhe())
> - vcpu_write_sys_reg(vcpu, val, reg);
> - else
> - __vcpu_assign_sys_reg(vcpu, reg, val);
> -}
> -
> static void __vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long target_mode,
> u64 val)
> {
> @@ -101,14 +85,14 @@ static void enter_exception64(struct kvm_vcpu *vcpu, unsigned long target_mode,
>
> switch (target_mode) {
> case PSR_MODE_EL1h:
> - vbar = __vcpu_read_sys_reg(vcpu, VBAR_EL1);
> - sctlr = __vcpu_read_sys_reg(vcpu, SCTLR_EL1);
> - __vcpu_write_sys_reg(vcpu, *vcpu_pc(vcpu), ELR_EL1);
> + vbar = vcpu_read_sys_reg(vcpu, VBAR_EL1);
> + sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1);
> + vcpu_write_sys_reg(vcpu, *vcpu_pc(vcpu), ELR_EL1);
> break;
> case PSR_MODE_EL2h:
> - vbar = __vcpu_read_sys_reg(vcpu, VBAR_EL2);
> - sctlr = __vcpu_read_sys_reg(vcpu, SCTLR_EL2);
> - __vcpu_write_sys_reg(vcpu, *vcpu_pc(vcpu), ELR_EL2);
> + vbar = vcpu_read_sys_reg(vcpu, VBAR_EL2);
> + sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL2);
> + vcpu_write_sys_reg(vcpu, *vcpu_pc(vcpu), ELR_EL2);
> break;
> default:
> /* Don't do that */
> @@ -185,7 +169,7 @@ static void enter_exception64(struct kvm_vcpu *vcpu, unsigned long target_mode,
> */
> static unsigned long get_except32_cpsr(struct kvm_vcpu *vcpu, u32 mode)
> {
> - u32 sctlr = __vcpu_read_sys_reg(vcpu, SCTLR_EL1);
> + u32 sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1);
> unsigned long old, new;
>
> old = *vcpu_cpsr(vcpu);
> @@ -281,7 +265,7 @@ static void enter_exception32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
> {
> unsigned long spsr = *vcpu_cpsr(vcpu);
> bool is_thumb = (spsr & PSR_AA32_T_BIT);
> - u32 sctlr = __vcpu_read_sys_reg(vcpu, SCTLR_EL1);
> + u32 sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1);
> u32 return_address;
>
> *vcpu_cpsr(vcpu) = get_except32_cpsr(vcpu, mode);
> @@ -305,7 +289,7 @@ static void enter_exception32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
> if (sctlr & (1 << 13))
> vect_offset += 0xffff0000;
> else /* always have security exceptions */
> - vect_offset += __vcpu_read_sys_reg(vcpu, VBAR_EL1);
> + vect_offset += vcpu_read_sys_reg(vcpu, VBAR_EL1);
>
> *vcpu_pc(vcpu) = vect_offset;
> }
> --
> 2.39.5
>
next prev parent reply other threads:[~2026-07-29 13:52 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-29 13:18 [PATCH v7 0/8] KVM: arm64: pKVM vCPU state management at EL2 Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 1/8] KVM: arm64: Extract MPIDR computation into a shared header Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 2/8] KVM: arm64: Make vcpu_{read,write}_sys_reg available to HYP code Fuad Tabba
2026-07-29 13:52 ` Joey Gouly [this message]
2026-07-29 14:51 ` Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 3/8] KVM: arm64: Factor out reusable vCPU reset helpers Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 4/8] KVM: arm64: Move PSCI helper functions to a shared header Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 5/8] KVM: arm64: Add host and hypervisor vCPU lookup primitives Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 6/8] KVM: arm64: Minimise EL2's exposure of host VGIC state during world switch Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 7/8] KVM: arm64: Add primitives to flush/sync the VGIC state at EL2 Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 8/8] KVM: arm64: Implement lazy vCPU state sync for non-protected guests Fuad Tabba
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