From: Linu Cherian <linu.cherian@arm.com>
To: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Ryan Roberts <ryan.roberts@arm.com>,
Kevin Brodsky <kevin.brodsky@arm.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Gavin Shan <gshan@redhat.com>
Subject: Re: [PATCH v4 6/6] arm64: cpufeature: Detect BBML3 based on ID_AA64MMFR2_EL1.BBM
Date: Wed, 5 Aug 2026 14:50:55 +0530 [thread overview]
Message-ID: <anMAdzxG4HeKPq0L@a079125.arm.com> (raw)
In-Reply-To: <anHuYDo5TIa-s7L8@willie-the-truck>
Hi,
On Tue, Aug 04, 2026 at 02:51:28PM +0100, Will Deacon wrote:
> On Mon, Aug 03, 2026 at 09:22:02AM +0530, Linu Cherian wrote:
> > Hi Will,
> >
> > On Fri, Jul 31, 2026 at 04:13:20PM +0100, Will Deacon wrote:
> > > On Thu, Jul 23, 2026 at 10:10:33AM +0530, Linu Cherian wrote:
> > > > Add ID_AA64MMFR2_EL1.BBM based BBML3 feature detection in
> > > > cpu_supports_bbml3() so that cpus with the feature would
> > > > not have to be added into MIDR based supports_bbml3_list.
> > > >
> > > > Reviewed-by: Gavin Shan <gshan@redhat.com>
> > > > Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
> > > > Signed-off-by: Linu Cherian <linu.cherian@arm.com>
> > > > ---
> > > > arch/arm64/kernel/cpufeature.c | 17 +++++++++--------
> > > > 1 file changed, 9 insertions(+), 8 deletions(-)
> > > >
> > > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> > > > index 896bafdb00b1..dbd7d187520c 100644
> > > > --- a/arch/arm64/kernel/cpufeature.c
> > > > +++ b/arch/arm64/kernel/cpufeature.c
> > > > @@ -2133,6 +2133,12 @@ static bool hvhe_possible(const struct arm64_cpu_capabilities *entry,
> > > >
> > > > bool cpu_supports_bbml3(void)
> > > > {
> > > > + u64 mmfr2;
> > > > +
> > > > + mmfr2 = __read_sysreg_by_encoding(SYS_ID_AA64MMFR2_EL1);
> > > > + if (SYS_FIELD_GET(ID_AA64MMFR2_EL1, BBM, mmfr2) >= ID_AA64MMFR2_EL1_BBM_3)
> > > > + return true;
> > >
> > > This is a bit of a nit, but I think it would be more consistent to use
> > > has_cpuid_feature() here instead of __read_sysreg_by_encoding(), similarly
> > > to how we handle kpti in unmap_kernel_at_el0() (which also has both an
> > > ID register field and a list of MIDRs).
> >
> > force_pte_mapping required by map_mem(during early boot) needs
> > cpu_supports_bbml3 check and cpu features/capabilities are not
> > initialized by that time. Should i add a comment there to clarify this ?
>
> It looks to me like has_cpuid_feature() will call
> __read_sysreg_by_encoding() under the hood for SCOPE_LOCAL_CPU.
>
> What am I missing?
Below is my understanding. Correct me if i am wrong.
has_cpuid_feature depends on struct arm64_cpu_capabilities *entry.
Inorder to derive *entry from a capability ID, cpucap_ptrs should be
in initialized state and that wont be the case when force_pte_mapping
invokes cpu_supports_bbml3.
>
> Will
next prev parent reply other threads:[~2026-08-05 9:21 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-23 4:40 [PATCH v4 0/6] Add BBML3 cpu feature Linu Cherian
2026-07-23 4:40 ` [PATCH v4 1/6] arm64: cputype: Add Cortex-A520AE definitions Linu Cherian
2026-07-23 4:40 ` [PATCH v4 2/6] arm64: cputype: Add C1-Nano definitions Linu Cherian
2026-07-23 4:40 ` [PATCH v4 3/6] arm64: cpufeature: Extend bbml2_noabort support list Linu Cherian
2026-07-23 7:26 ` Anshuman Khandual
2026-07-23 4:40 ` [PATCH v4 4/6] arm64: sysreg: Add BBM_3 Linu Cherian
2026-07-23 4:40 ` [PATCH v4 5/6] arm64: cpufeature: Rename BBML2_NOABORT as BBML3 Linu Cherian
2026-08-06 17:11 ` Will Deacon
2026-07-23 4:40 ` [PATCH v4 6/6] arm64: cpufeature: Detect BBML3 based on ID_AA64MMFR2_EL1.BBM Linu Cherian
2026-07-31 15:13 ` Will Deacon
2026-08-03 3:52 ` Linu Cherian
2026-08-03 4:19 ` Anshuman Khandual
2026-08-04 13:51 ` Will Deacon
2026-08-05 9:20 ` Linu Cherian [this message]
2026-08-06 11:26 ` Will Deacon
2026-08-06 17:11 ` [PATCH v4 0/6] Add BBML3 cpu feature Will Deacon
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