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X-CSE-ConnectionGUID: aAE0wnq4T1a8sRZ4Qi+xFA== X-CSE-MsgGUID: +j+OWAsXT86m2nufGqzv1Q== X-IronPort-AV: E=McAfee;i="6800,10657,11869"; a="112341519" X-IronPort-AV: E=Sophos;i="6.25,212,1779174000"; d="scan'208";a="112341519" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Aug 2026 13:52:24 -0700 X-CSE-ConnectionGUID: qcZMscCWQk+11TuVWfxZow== X-CSE-MsgGUID: o3UoJiz5RGmlvoWW3BCrhQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,212,1779174000"; d="scan'208";a="287378575" Received: from slindbla-desk.ger.corp.intel.com (HELO localhost) ([10.245.244.2]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Aug 2026 13:52:19 -0700 Date: Sat, 8 Aug 2026 23:52:16 +0300 From: Andy Shevchenko To: Varshini Rajendran Cc: ehristev@kernel.org, jic23@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com, claudiu.beznea@tuxon.dev, srini@kernel.org, marcelo.schmitt@analog.com, radu.sabau@analog.com, joshua.crofts1@gmail.com, jorge.marques@analog.com, Jonathan.Santos@analog.com, jishnu.prakash@oss.qualcomm.com, antoniu.miclaus@analog.com, duje@dujemihanovic.xyz, mazziesaccount@gmail.com, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 09/17] nvmem: microchip-otpc: nvmem: microchip-otpc: add tag-based packet lookup Message-ID: References: <20260806074024.531259-1-varshini.rajendran@microchip.com> <20260806074024.531259-10-varshini.rajendran@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260806074024.531259-10-varshini.rajendran@microchip.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260808_135227_571203_7EAC2C5F X-CRM114-Status: GOOD ( 19.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Aug 06, 2026 at 01:10:16PM +0530, Varshini Rajendran wrote: > Add support for accessing OTP packets by their tag which is a FourCC > while preserving backward compatibility with the existing ID-based > lookup. > > The OTP memory layout can vary across devices and may change over time, > making the packet ID approach unreliable when the memory map is not > known in advance. The packet tag provides a reliable way to identify > and access packets without prior knowledge of the OTP memory layout. > > Two offset encodings are now supported: > 1. Legacy ID-based: offset = OTP_PKT(id) = id * 4 > Used in DT as: reg = ; > 2. TAG-based: offset = 4-byte ASCII packet tag (FourCC) > Used in DT as: reg = <0x41435354 0x4c>; (tag "ACST") > > The driver resolves offsets matching valid legacy selectors (multiples > of 4 within the packet count) through ID lookup, falling back to tag > lookup for other valid values. This ensures existing device trees > continue to work while enabling new tag-based access. During probe, > packet meta data including the tag is read and cached. > > The stride of the nvmem memory is set to 1 in order to support tag based > offsets, comment in the header file is updated accordingly. ... > +static bool mchp_otpc_is_valid_fourcc(u32 tag) > +{ > + int i; > + u8 c; > + > + for (i = 0; i < 4; i++) { for (unsigned int i = 0; i < sizeof(tag); i++) { > + c = (tag >> (i * 8)) & 0xff; > + if (c < 0x20 || c > 0x7e) > + return false; > + } > + > + return true; > +} -- With Best Regards, Andy Shevchenko