Re: [PATCH v5] arm64: Don't read GMID_EL1 when MTE is disabled

[Catalin Marinas <catalin.marinas@arm.com>]

On Thu, Aug 27, 2026 at 07:59:37PM +0100, Fuad Tabba wrote:
> +bool gmid_el1_accessible(const struct cpuinfo_arm64 *info)
> +{
> +	const struct arm64_ftr_bits *ftrp;
> +	s64 mte, ovr;
> +	u64 ftr_mask;
> +
> +	/* No ID register reflects CONFIG_ARM64_MTE. */
> +	if (!IS_ENABLED(CONFIG_ARM64_MTE))
> +		return false;
> +
> +	for (ftrp = ftr_id_aa64pfr1; ftrp->width; ftrp++) {
> +		if (ftrp->shift == ID_AA64PFR1_EL1_MTE_SHIFT)
> +			break;
> +	}
> +
> +	ftr_mask = arm64_ftr_mask(ftrp);
> +	mte = arm64_ftr_value(ftrp, info->reg_id_aa64pfr1);
> +
> +	/* The boot CPU runs before init_cpu_ftr_reg() strips unsafe overrides. */
> +	if ((id_aa64pfr1_override.mask & ftr_mask) == ftr_mask) {
> +		ovr = arm64_ftr_value(ftrp, id_aa64pfr1_override.val);
> +		mte = arm64_ftr_safe_value(ftrp, ovr, mte);
> +	}

This works. Or we could cut a few lines and just do
cpuid_feature_extract_unsigned_field() for mte and ovr and do a
hard-coded min(mte, ovr) as we now it's lower-safe. I don't have a
strong opinion either way, so for this patch:

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>